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Sun, XinyuFault Modeling and Fault Type Distinguishing Test Methods for Digital Microfluidics Chips
MS, University of Cincinnati, 2013, Engineering and Applied Science: Computer Engineering
Physical defects in digital microfludics chips (DMCs) can be very complicated and extremely difficult to find precise models, because each defect may occur anywhere. In this thesis, we develop high-level abstract fault models based on investigating the faulty and fault-free behaviors of droplet moving. Two new fault models that were not found previously are proposed to enhance the reliability of DMCs. We believe that the high-level fault models can completely cover all defects involving two cells in a DMC array. Based on the new high-level fault models, we propose march algorithms (march-d and march-p/p+) to generate test patterns that can detect and distinguish fault types for each faulty digital microfludics chip. This is accomplished by merging both march-d and part of march-p without causing too much test length increase. These algorithms are implemented into a FPGA board attached to the simulated digital microfluidics chip such that built-in self-test can be accomplished without human intervention. We also develop an EDA tool and simulation platform for the proposed DMC-BIST system. Experimental results demonstrate that the proposed fault models, test and fault type distinguishing methods, built-in self-test circuit design, and emulation tool can effectively and efficiently achieve high quality test with minimal test cost.

Committee:

Wen Ben Jone, Ph.D. (Committee Chair); Xingguo Xiong, PhD (Committee Member); Ian Papautsky, Ph.D. (Committee Member)

Subjects:

Computer Engineering

Keywords:

Fault modeling;Test methods;BIST;Digital microfluidics chip;Microfluidics EDA;March algorithm