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PING-PONG AUTO-ZERO AMPLIFIER WITH RAIL-TO-RAIL OUTPUT BUFFER

2018, Master of Science, University of Akron, Electrical Engineering.
This work presents a ping-pong auto-zero amplifier for precision sensor applications. The transistor level circuit design of the amplifier building blocks including the transconductance stage (Gm), the transimpedance stage (R), and the output buffer has been optimized by using the proposed transistor circuit model. This sets the DC bias point of each transistor in the desired spot in the saturation region. As a result, the bias current, gate-to-source (VGS), drain-to-source (VDS), and the aspect ratio (W/L) of each transistor can be flexibly determined. The proposed transistor circuit model will enable a stable design that leads to a stable operation. The ping-pong auto-zero amplifier was implemented with CMOS 0.18 µm technology, where the measurement results show the offset voltage of 0.1 mV, the open-loop gain of 64 dB, the CMRR of 80 dB, the PSRR of 64 dB, the slew rate of 1 V/µs and the power consumption of 3 mW with a 5 V supply.
Kye Shin Lee, Dr (Advisor)
Nghi Tran, Dr (Committee Member)
Ryan Toonen, Dr (Committee Member)

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Naini, S. (2018). PING-PONG AUTO-ZERO AMPLIFIER WITH RAIL-TO-RAIL OUTPUT BUFFER. (Electronic Thesis or Dissertation). Retrieved from https://etd.ohiolink.edu/

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Naini, Srikar Reddy. "PING-PONG AUTO-ZERO AMPLIFIER WITH RAIL-TO-RAIL OUTPUT BUFFER." Electronic Thesis or Dissertation. University of Akron, 2018. OhioLINK Electronic Theses and Dissertations Center. 19 Oct 2018.

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Naini, Srikar Reddy "PING-PONG AUTO-ZERO AMPLIFIER WITH RAIL-TO-RAIL OUTPUT BUFFER." Electronic Thesis or Dissertation. University of Akron, 2018. https://etd.ohiolink.edu/

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