OhioLINK
Electronic Theses & Dissertations Center

Home
Search ETDs:
A SRAM-Based Log Buffer Flash Translation Layer for Solid State Disk using Fully-Associative Sector Translation
Heng, Li
2009, MS, University of Cincinnati, Engineering : Computer Engineering.
The bottle neck problem of “erase before write” in NAND-based flash memory and its lifetime are the most important issues in today's flash design. This paper offers different approaches on improving the lifetime and performance of current generation solid state disks including cache algorithms and SRAM-based log buffer scheme with careful study and discussion on several design issues as well as the control logic of flash memory array. Both block level associative sector translation scheme and fully associative sector translation scheme are discussed in detail in the paper.
Yiming Hu (Committee Chair)
Carla Purdy (Committee Member)
Karen Davis (Committee Member)
71 p.
Engineering

Recommended Citations

Hide/Show APA Citation

Heng, L. (2009). A SRAM-Based Log Buffer Flash Translation Layer for Solid State Disk using Fully-Associative Sector Translation. (Electronic Thesis or Dissertation). Retrieved from https://etd.ohiolink.edu/

Hide/Show MLA Citation

Heng, Li. "A SRAM-Based Log Buffer Flash Translation Layer for Solid State Disk using Fully-Associative Sector Translation." Electronic Thesis or Dissertation. University of Cincinnati, 2009. OhioLINK Electronic Theses and Dissertations Center. 20 Apr 2018.

Hide/Show Chicago Citation

Heng, Li "A SRAM-Based Log Buffer Flash Translation Layer for Solid State Disk using Fully-Associative Sector Translation." Electronic Thesis or Dissertation. University of Cincinnati, 2009. https://etd.ohiolink.edu/

Files

ucin1232126802.pdf (436.19 KB) View|Download
ucin1232126802
683