MS, University of Cincinnati, 2016, Engineering and Applied Science: Electrical Engineering

Embedded systems have found applications in many fields including consumer electronics, medical devices, defense technology systems, and telecommunications. With advances in technology, newer electronic devices require high speed and durability and modern embedded systems need to be designed to meet these demanding requirements. Recent changes in embedded system architectures have incorporated both hardware and software components. Traditionally, designs for hardware and software were developed separately in the early stages of the co-design process. Because of recent developments in the hardware software co-design approach, SoC designs can now implement hardware dependent software and software dependent hardware. The major objective of this thesis is to provide an example of hardware and software implementations of a specific module, a priority queue, to enable students of embedded system design to compare different approaches to developing a hardware/software design of this commonly used data structure and to customize priority queue designs for specific applications. A second objective is to discuss and compare the different verification methods currently available for hardware and software modules and to clarify the advantages of formal verification, which is becoming a standard verification method for hardware modules.

Committee: Carla Purdy Ph.D. (Committee Chair); Wen-Ben Jone Ph.D. (Committee Member); George Purdy Ph.D. (Committee Member) Subjects: Electrical Engineering

PHD, Kent State University, 2015, College of Arts and Sciences / Department of Computer Science

MAZEN SALEM ALZYOUD, Ph.D., December 2015 COMPUTER SCIENCE ONTOLOGY DESIGN PATTERNS WITH APPLICATIONS TO SOFTWARE MEASUREMENT (140 PP.) Ontologies are a cornerstone of the semantic web. Ontologies are helpful in sharing and understanding domain concepts, and they also enable reusability of domain knowledge. Furthermore, ontologies enable logical inferencing by using existing logic reasoning mechanisms. This inferencing may be used to discover new knowledge and to check and remove inconsistent content. Ontology design is a crucial research area for semantic technologies. Ontology Design Patterns (ODPs) aim to support the process of ontology engineering, and may also be used to improve the existing ontologies. We design a procedure to help in creating content ontology design patterns, and we use this procedure to create new content ontology design patterns for Course and for Professor in the University/Academy domain, which work as a generic cases for developing ontology design patterns. Furthermore, we promote the process of reusability, by developing recommended guidelines for how to select ontology design patterns. Ontologies are usually used to organize information about a domain. We want to extend the use of ontologies in the area of ontology reasoning, so that ontologies can be effectively used in organizing and directing processes. By using axioms, ontology reasoning can play a key role in answering queries. Also, the reasoning checks the consistency and finds the logical contradictions. We take product quality metrics in the software measurement domain as an example to create a correct and consistent ontology, which may be used to improve the interaction between metrics in the software development process. Architectural patterns describe how to organize an ontology. These types of patterns can be used in the conceptual modeling phase and at the beginning of the ontology design phase. We introduce a new architectural ontology design pattern to ch (open full item for complete abstract)

Committee: Austin Melton (Advisor); Austin Melton (Committee Chair); Johnnie Baker (Committee Member); Angela Guercio (Committee Member); Alan Brandyberry (Committee Member); Jeffrey A Ciesla (Committee Member) Subjects: Computer Science

MS, University of Cincinnati, 2014, Engineering and Applied Science: Computer Engineering

Today embedded systems are found in all areas of our lives and have many different applications. They differ in their uses and properties as well as employing both software and hardware components in their implementations. This has made the design and development process for them much more complicated. Learning to use such a process is especially difficult for electrical engineering students, who have not been introduced to the systematic design and testing methodologies familiar to students trained in computer science and computer engineering. In this thesis, we illustrate the similarities and differences in the design and development design processes in for software systems and for software/hardware embedded systems. We give details for every stage for both types of systems and we develop detailed examples for example embedded systems, using a design process which extends the standard UML-based process used for software. In addition, we include details about project management. The examples and additional exercises and questions provide a set of tutorials which will assist students unfamiliar with complex design procedures in mastering the necessary skills to become well-trained embedded system developers.

Committee: Carla Purdy Ph.D. (Committee Chair); Raj Bhatnagar Ph.D. (Committee Member); George Purdy Ph.D. (Committee Member) Subjects: Computer Engineering

Master of Computer Science, Miami University, 2009, Computer Science and Systems Analysis

Formal specification languages can be used to support the rigorous development of complex software systems when these systems must be of high quality. Unfortunately, writing formal specifications and refining them into designs can be a challenging activity. Use of design patterns, which are a widely accepted design activity, helps create quality designs, but adds further complexity to the design activity.We have developed a tool ADEPT, Advanced Design Employing Pattern Templates, that aids designers in using both formal specifications and design patterns. The software developer will use the ADEPT tool to guide them through the process of choosing a design pattern that is related to their formal system specification for the purpose of automatically supporting refinement. The user is guided through refining the specification and creating a design that not only incorporates one of the design patterns but also meets the given system specification.

Committee: Ann Sobel PhD (Advisor); James Kiper PhD (Committee Member); Gerald Gannod PhD (Committee Member) Subjects: Computer Science

Doctor of Philosophy, Case Western Reserve University, 2010, EECS - Computer Engineering

Security of integrated circuits (ICs) has emerged as a major concern at different stages of IC life-cycle, spanning design, test, fabrication and deployment. Modern ICs are becoming increasingly vulnerable to various forms of security threats, such as: 1) illegal use of hardware intellectual property (IP) or “IP Piracy”; 2) illegal manufacturing of IC or “IC Piracy”; 3) insertion of malicious circuits, referred as “Hardware Trojan”, in a design to cause in-field circuit malfunction, and 4) leakage of secret information from an IC. These security threats are accentuated by current IC design practices, such as the widespread use of hardware IP modules to design complex system-on-chips (SoCs). In addition, the economics of electronic manufacturing dictates widespread outsourcing of integrated circuit fabrication to off-shore facilities, which increases the vulnerability to these attacks. In this research, we explore novel hardware design approaches that incorporate a key-based design obfuscation scheme to effectively protect a design against various security threats, while incurring low hardware and computational overheads. Obfuscation is a technique that makes comprehending and reverse-engineering a design difficult. To the best of our knowledge, this is the first effort to develop a systematic and provably robust hardware obfuscation approach that enables hardware protection at different stages of the IC life-cycle. Effectiveness of these approaches for protection against IP reverse-engineering and piracy, hardware Trojan and scan-based information leakage is evaluated with benchmark circuits and open-source IP cores. The obfuscation approaches are developed for both firm (gate-level) and soft (register transfer level) IPs. The principles of the obfuscation approach have been extended to protection of embedded software against piracy and malicious modification. An enhanced secure IC design flow with associated computer-aided design (CAD) tools is also develope (open full item for complete abstract)

Committee: Swarup Bhunia (Committee Chair); Christos Papachristou (Committee Member); Francis Merat (Committee Member); David McIntyre (Committee Member); Pankaj Rohatgi (Committee Member) Subjects: Electrical Engineering

Master of Sciences, Case Western Reserve University, 2008, Epidemiology and Biostatistics

Genetic epidemiology relies on simulated data to support development of theory and methods. Simulated data are designed to reflect, as accurately as possible, the true phenotypic and genotypic distributions of individuals sampled from differenttypes of relationship clusters. Common simulation methods can be classified into two groups: agent-based methods, in which individuals are simulated, one at a time, according to the rules of Mendelian inheritance and other assumptions, and structure-based methods, in which aggregates of individuals exhibiting properties of interest are simulated, with genotypic information inferred conditionally on both phenotype and structure. A previously untried software design is proposed to support both agent-based and structure-based simulation with equal facility. The mediator design pattern is applied to simulation design, and is shown to (1) reduce the complexities arising from the potentially huge number of communication channels required between autonomous agents and (2) to provide an efficient mechanism by which higher-level system objects may override default behaviors of lower-level objects.

Committee: Courtney Gray-McGuire PhD (Committee Chair); Robert Elston PhD (Committee Member); Jing Li PhD (Committee Member) Subjects: Biostatistics; Computer Science; Epidemiology; Genetics; Systems Design

Doctor of Philosophy, The Ohio State University, 2024, Industrial and Systems Engineering

Sociotechnical systems in safety-critical domains are distributed and contain interdependencies between the different elements, including human and automated roles that need to coordinate and synchronize their activities with dynamic events in the environment. The advancement of technology and the introduction of machines capable of acting at a higher level of autonomy has increased the complexity of such Distributed Work Systems (DWSs). An envisioned DWS is described by a set of static paper-based documents and will be deployed in the next few years. The short-range low-altitude air mobility system is one very good example of an envisioned DWS. Interactions between human and automated roles and their environment are dynamic, evolve, and change over time, causing emergent effects like taskload peaks and coordination breakdowns. A well-designed DWS will be able to keep pace with the work environment dynamics (like the dynamics of aircraft governed by laws of flight in a short-range low-altitude air mobility system) and succeed in responding to the disturbance. This creates the need to understand the dynamics of envisioned DWS, such as how a DWS performs in high-paced situations like anomaly response. Assessing the feasibility and robustness of an envisioned DWS comes with challenges: the physical system does not yet exist, its design and operations are often underspecified, and multiple versions may exist within a designer community about what future operations will look like. Therefore, as a part of this dissertation, an exploratory early-stage computational modeling and simulation technique is described and demonstrated to evaluate an envisioned DWS. Using functional modeling and computational simulation capabilities, the dissertation shows a technique that can help evaluate envisioned DWS by discovering things that are not uncovered by traditional normative simulations. The primary advantage of the technique is the ability to evaluate the dynamics of work in (open full item for complete abstract)

Committee: Martijn Ijtsma (Advisor); Michael Rayo (Committee Member); David Woods (Committee Member) Subjects: Industrial Engineering; Systems Design

MS, University of Cincinnati, 2024, Education, Criminal Justice, and Human Services: Information Technology

Open-source software projects have become prevalent in everyday applications, and it is imperative to continue supporting these projects while empowering the people behind them. The state of diversity and inclusion efforts within the leadership of open-source communities is of utmost importance and help shape effective strategies for positive change. The purpose of this research is to gain insight into the challenges, experiences, and perspectives of individuals involved in open-source community leadership. Using participatory design methodology, this research explores what framework and design characteristics will help to develop a tool for the selection of open-source community leaders. Eleven people from open-source software communities were recruited to participate in a participatory design activity to inform the selection and design of a tool to support informed decision-making by voting bodies associated with a particular open-source community. The results show that profile and demographics of individuals, map view of group location, leadership experience of individuals and trends over time were found to be the most useful to open-source community members when learning more about candidates running for open-source boards. The discussion describes how these types of features can be integrated into tools used by these communities to make selections and how tools such as this one could be extended to other use cases.

Committee: Jess Kropczynski Ph.D. (Committee Chair); Joseph Johnson Ph.D. (Committee Member); Shane Halse Ph.D. (Committee Member) Subjects: Information Technology

Doctor of Philosophy, The Ohio State University, 2023, Electrical and Computer Engineering

Direct sampling receivers and software defined systems require wide-band analog-to- digital converters (ADCs) at the RF front-end to provide support for high data rate communication and radar systems. With IF- and RF-sampling capabilities, these ADCs can potentially capture hundreds of data channels while being positioned near the antenna. Higher conversion rates allow more bandwidth to be digitized, while higher-resolution converters provide more dynamic range. For resolutions of 10 bits and more, a sample-and-hold amplifier (SHA) becomes a key component in these systems. To relax the increased bandwidth requirements on a single ADC, multiple lower sampling rate ADCs can be time interleaved (TI) to efficiently operate at the equivalent full sampling rate. However, the ADC front end sampler must still operate at full rate to avoid timing mismatch and provide high linearity. We present a SHA in a 130 nm SiGe BiCMOS commercial technology to enable high speed operation, while offering monolithic integration with a high performance CMOS ADC. The BiCMOS process presents high speed heterojunction bipolar transistors (HBTs) operating at increased fT and reduced noise at high frequencies. The SHA operates with input dependent hold-mode distortion cancellation utilizing charge reuse at the high-speed switching nodes. The proposed topology does not load the hold storage node and utilizes charge reuse at the sampling input buffer for fast switching. The SHA uses two cascaded track-and-hold amplifiers (THAs) sampled on opposite phases of the sampling clock. The THA topology is chosen to support the fast settling time and high resolution requirements. A 50 Ω input buffer is in-serted in the first THA, for ease of system integration with an RF front-end, while enabling low-noise and high linearity operation. Each THA includes an input buffer, a switched-emitter follower (SEF) buffer, and an output buffer. The output buffer is used to isolate the sensitive sampling capacitor node (open full item for complete abstract)

Committee: Waleed Khalil (Advisor); Marvin White (Committee Member); Roblin Patrick (Committee Member) Subjects: Electrical Engineering; Engineering; Technology

Master of Science, Miami University, 2023, Computer Science and Software Engineering

Software models are used to analyze and understand the properties of the system, providing stakeholders with an overview of how the system should work before actually implementing it. Such models are usually created informally, such as drawing sketches on a whiteboard or paper, especially during the early design phase, because these methods foster communication and collaboration among stakeholders. However, these informal sketches must be formalized to be useful in later applications, such as analysis, code generation, and documentation. This formalization process is often tedious, error-prone, and time-consuming. In an effort to avoid recreating formal models from scratch, this thesis presents SkeMo, a sketch-based software modeling tool. SkeMo is built on a CNN-based image classifier using 3000 input sketches of class diagram components and integrated into the functionality of an existing web-based model editor, the Instructional Modeling Language (IML), with a newly implemented touch interface. SkeMo was evaluated using a ten-fold cross-validation to assess the image classifier and through a user study involving 20 participants to collect metrics and feedback. The results demonstrate the promising potential of sketch-based modeling as an intuitive and efficient modeling practice, allowing users to quickly and easily create models to design complex software systems.

Committee: Eric Rapos (Advisor); Christopher Vendome (Committee Member); Xianglong Feng (Committee Member); Douglas Troy (Committee Member) Subjects: Computer Science; Engineering

Master of Science, Miami University, 2021, Computer Science and Software Engineering

Domain-specific modeling languages abstractly represent domain knowledge in a way such that non-technical users can understand the information presented in the model. These languages can be created for any domain, provided the necessary knowledge is available. This thesis uses the domain of educational game design as a demonstration of the ability of domain-specific modeling. Games are useful tools in supplementing the traditional education of students. While games are an effective learning aid, educators often do not possess the design or technical skills to develop a game for their own use. MOLEGA (the Modeling Language for Educational Games) is a domain-specific modeling language that enables guided model design and code generation. Using MOLEGA, users can create abstract models inspired by UML class diagrams to represent card games of two selected variants. User models are then used to generate executable source code for a mobile compatible, browser-based game that can be deployed on a server by following provided instructions. MOLEGA is evaluated for validity and correctness using a suite of example models.

Committee: Eric J. Rapos PhD (Advisor); Matthew Stephan PhD (Committee Member); Karen C. Davis PhD (Committee Member) Subjects: Computer Science

Master of Science in Engineering, University of Akron, 2021, Electrical Engineering

The idea of a separate and centralized controller for a network has revolutionized the entire networking system. This new architecture of software-defined networking (SDN) has paved the way for new possibilities and innovations. However, it has simultaneously created new control plane challenges, such as scalability, resilience, consistency, privacy, and cost-efficiency. Researchers are working on novel control plane design concepts to mitigate these limitations. Selecting one design model from all the design options with conflicting characteristics can be overwhelming for an SDN adopter, as there is no standard protocol regarding control plane design deployment. The purpose of this thesis is to provide SDN adopters a systematic way of choosing the optimal control plane architecture for their specific network requirements. In this thesis, we propose using the analytical hierarchical process (AHP) to model the control plane design selection dilemma into a structured decision-making problem. A thorough survey of control plane design strategies and challenges is conducted for collecting data regarding the proposed method. A standard scaling system is implemented to quantify linguistic information. Moreover, pair-wise comparison matrices are used to calculate relative performances of alternatives concerning control plane scalability, resilience, consistency, privacy, and cost-efficiency. The relative priorities of network requirements are also measured using pair-wise comparison matrices. The final performance values of the options are obtained from a decision matrix addressing trade-offs. The results are then ranked, the highest value signifying the best choice. By structuring the complex design choice problem into a systematized model and visually illustrating performance and priority values, this thesis provides new SDN users proper guidance for selecting their desired control plane architecture according to their network demands, comprehending the benefits an (open full item for complete abstract)

Committee: Hamid Bahrami PhD (Advisor); Jin Wei-Kocsis PhD (Committee Member); Kye-Shin Lee PhD (Committee Member) Subjects: Electrical Engineering

PhD, University of Cincinnati, 2019, Engineering and Applied Science: Electrical Engineering

Embedded systems are at the forefront of everyday life, being utilized in smart devices, such as cell phones and internet of things (IoT), devices around the home, as well as the latest components in aerospace and automobile technology. Reliance on these devices is critical to the current day to day operations of society, and these devices are required to be secure and reliable to maintain the safety of those who depend on them. Among these devices, trusted safety critical embedded systems are rigorously designed with security and reliability so they can be counted on to perform their assigned responsibilities with a low probability of failure, as such a failure could cost people their lives in the worst case scenario. Trusted embedded systems are often developed with hardware, using the latest in field programmable gate arrays (FPGA), and integrated circuits (ICs), as hardware development has a long established process for producing high quality, fault tolerant systems and reporting performance in a standardized way. The processes utilized are mature and repeatable, and this shows the reliability of these systems is consistent. These systems have increased in complexity, performing more and more tasks with each incremental increase in hardware performance. Unfortunately the end to Moore's Law is coming, and though the development of new architectures and techniques has allowed for the end to be delayed, a shift in design is required to continue increasing the complexity of trusted embedded systems. Software is being looked at to continue the trend of complex, high performance systems, but suffers from its utilization in modern, agile development environments and the use of unreliable metrics for reliability. Therefore, software is not currently always suitable for integration into safety critical systems, and requires a new, encompassing development procedure that utilizes techniques and metrics to allow it to be used in hardware/software solutions. This dissertati (open full item for complete abstract)

Committee: Carla Purdy Ph.D. (Committee Chair); Wen-Ben Jone Ph.D. (Committee Member); Daniel M. Peairs Ph.D. (Committee Member); Ranganadha Vemuri Ph.D. (Committee Member); Philip Wilsey Ph.D. (Committee Member) Subjects: Computer Engineering

Master of Fine Arts, Miami University, 2019, Art

Designers and managers of escape rooms or live-action adventure games are encountering an increasing challenge of implementing highly immersive experiences without the use of (smart) technology, and those that are including technology face high expense, high risk, or both. The increasing complexity of technology opens the door for designing innovative immersive experiences while simultaneously excluding many immersive designers that would benefit from their use. Through a deeper understanding of the design process and common problems preventing or hindering this population's use of immersive technology, we can identify and design empowering solutions. These solutions not only have the potential to dramatically speed up innovation in the live-action game space but to save many existing businesses from failing due to being unable to compete. Focusing on accessibility and flexibility would allow for integrating technology much earlier in the design process thereby reducing risk and increasing the cohesiveness of the design; broadening the scope of what types of experiences are possible which increases competitiveness; and decrease overall time and cost by solving common reliability and maintainability problems that plague inexperienced and non-iterative technology design work.

Committee: Dennis Cheatham (Advisor); Michael Bailey-Van Kuren (Committee Member); Eric Hodgson (Committee Member) Subjects: Design; Electrical Engineering; Information Technology

PhD, University of Cincinnati, 2001, Engineering : Computer Science and Engineering

Transformative applications are computationally intensive applications like image compression and decompression algorithms. Embedded system implementations of transformative applications typically consist of multiple hardware and software processing elements. The objective of the research presented in this dissertation is to develop and implement innovative computer-aided design techniques for system-level cosynthesis of transformative applications for heterogeneous hardware-software architectures. As part of the research 1) a specification library, 2) an internal graph based format, and design tools for 3) latency minimization and 4) throughput maximization are developed. The specification library, graph format and optimization tools are encased in a system-level design environment called STELLAR. This dissertation presents the STELLAR environment for system-level hardware-software cosynthesis of transformative applications.The specification library called NOVA is based on an object-oriented approach and contains a collection of C++ classes.NOVA provides classes for specification of functionality, architecture and performance constraints. NOVA models the application functionality as a hierarchical, control and dataflow based task graph. It is an executable specification that can be functionally verified after compilation with the standard gcc compiler. NOVA provides constructs for specifying latency and throughput constraints on the application. It also provides constructs for specifying the system architecture that can include general purpose software processors, field programmable gate arrays, application specific integrated circuits and memory elements. The library supports specification of area constraints, reconfiguration times, memory sizes and memory widths of the various architecture elements. The internal graph format called NEBULA is derived from the NOVA specification. NEBULA captures the essential behavioral, structural and performance information of th (open full item for complete abstract)

Committee: Dr. Ranga Vemuri (Advisor) Subjects:

Master of Science, University of Toledo, 2016, Electrical Engineering

This thesis demonstrates development of a complete suite of path planning, elevator scheduling and resource allocation algorithms to manage multiple concurrent requests, in real time and in a dynamic context, for storage and retrieval of vehicles loaded onto robotic carts for a robotic, fully-automated, multi-story and driving-free parking structure. The objective is to utilize, for parking, the available spaces across the floors of a parking structure that does not have any driving lanes at a much higher percentage rate which is greater than or equal to 80% in all cases while keeping the customer waiting times at minimum. Path search and planning employs the incremental informed search algorithm D* Lite with domain-specific heuristics, and the uninformed search algorithm Uniform Cost Search in a completely-automated framework. An optimization algorithm based on nested partitions and genetic algorithm is adapted for scheduling of a group of elevators in the multi-story parking structure environment. A small percentage of parking spots are reserved as “blank cells” to facilitate movement of roller beds carrying a vehicle to its storage or retrieval destination. Resource allocation and management is accomplished using statistical models employing queueing theory for structural resources such as blank cells and elevators while minimizing customer waiting time. Lower bounds on the number of elevators needed for a specific floor count and number of parking spaces per floor are derived using statistical modeling. Multiple vehicles are considered to be potentially moving from one parking space to another by roller bed pallets moving along tracks mounted on the surface of each storage cell. A software simulator based on multi-threaded Java code and unified modeling language was developed to perform empirical testing and validation of the performance of the proposed integration framework for the set of path search, elevator scheduling and resource management algorithm (open full item for complete abstract)

Committee: Gursel Serpen (Committee Chair); Kevin Xu (Committee Member); Ahmad Javaid (Committee Member) Subjects: Artificial Intelligence

Bachelor of Arts, Wittenberg University, 2012, Computer Science

I have created a program to assist in making characters for the Savage Worlds tabletop role-playing game published by Pinnacle Entertainment Group. This pro- gram was written in Java and uses a SQLite database to store character options. Principles of user-centered design were followed to make the program intuitive and easy to use and feedback from potential users was gathered. Programming design patterns were used to make it easier for me to implement and maintain the program. Ultimately, this program has been a culmination of my learning here at Wittenberg University and has been an opportunity for me to independently expand my knowledge of Computer Science.

Committee: Steven Bogaerts Dr. (Advisor); Kyle Burke Dr. (Committee Member); Stephanie Little Dr. (Committee Member) Subjects: Computer Science

Master of Science (MS), Wright State University, 2009, Computer Science

In the realm of software development, projects are plagued by continuous maintenance at the source code level as well as tedious transformations from formal specifications to source code. Such work consumes a large amount of time only to create complicated, un-intelligible, and un-reusable code that is completely detached from initial design rational. To cope with these problems, The Air Force Institute of Technology (AFIT) Wide Spectrum Object Modeling Environment (AWSOME) was designed to generate specifications that can be transformed into abstract designs and finally into source code. The specifications are written in the AFIT Wide-spectrum Language (AWL) and parsed in by the tool into a meta-model. The focus of this thesis is to expand AWSOME's transform capabilities by automating the application of design patterns to existing ASTs by altering their structure. Automating the application of design patterns to existing software models offers many advantages including extending reusability and easing maintenance.

Committee: Thomas Hartrum PhD (Advisor); Thomas Hartrum PhD (Committee Co-Chair); Mateen Rizki PhD (Committee Co-Chair); Travis Doom PhD (Committee Member); Thomas Sudkamp PhD (Other); Joseph F. Thomas, Jr. PhD (Other) Subjects: Computer Science

MS, University of Cincinnati, 2001, Engineering : Industrial Engineering

This research discusses a solution to detection and avoidance of simulated potholes in the path of an autonomous vehicle operating in an unstructured environment. Pothole avoidance may be considered similar to other obstacle avoidance except that the potholes are depressions rather than extrusions from a surface. Simulated potholes were used in this research. A vision approach was used since the simulated potholes were significantly different visually from the background surface. Large potholes more than 2 feet in diameter were detected. Furthermore, only white potholes will be detected on a background of grass, asphalt, sand or green painted bridges. The solution to the problem was developed in a systematic manner. Various approaches to solving the problem were considered. After a specific camera and frame grabber were chosen, the physical and mechanical issues of camera mounting were solved. Then a software solution was designed using an object-oriented approach after modeling the solution in UML (Unified Modeling Language). The signals from the environment were captured by the vehicle's vision systems and pre-processed. A histogram was used to determine a brightness threshold to determine if a pothole is within the field of view. Then, a binary image is formed. Regions are then detected in the binary image. Regions that have a diameter close to 2 feet and a ratio of circumference to diameter close to 2 feet are considered potholes. The logic controller where navigational strategies are evaluated uses these signals to decide a final course of navigation. The primary significance of the solution is that it is interfaced seamlessly into the existing central logic controller. The solution can also be easily extended to detect and avoid any two dimensional shape. The solution was tested with different scenarios of pothole orientation. The results indicated the presence/absence of a pothole satisfactorily and a few snapshots of the experimental results are illustrated (open full item for complete abstract)

Committee: Ernest Hall (Advisor) Subjects: Engineering, Industrial

Master of Science, The Ohio State University, 2011, Mechanical Engineering

A framework for fault-failure and error propagation through different UML diagrams is introduced. The method is formalized by defining rules for fault propagation across different UML diagrams and also within a particular diagram. A study of the propagation of faults through each diagram highlights various structural and behavioral aspects of the software failure. This method will allow the designers to proactively analyze the functionality of the systems early in the design process, understand functional and other failures and their propagation paths, overall impact on the system, and redundancies and safeguards that should be added. The main advantage of the method is that it permits the analysis of the failure and fault propagation at a highly abstract level before any potentially high-cost design commitments are made thereby supporting decision making early in the design process, providing guidance to the designers to allow elimination of failures through exploration of system components and their functionality, and facilitating the development of more reliable system configurations. This method is discussed using an example and results are given for the Helium tank sub-system of the Space Shuttle's Reaction Control System (RCS). The work is further extended to automate the FPSA and build an executable model of FPSA

Committee: Prof. Carol Smidts (Advisor); Prof. Aldemir Tunc (Committee Member) Subjects: Mechanical Engineering