Doctor of Philosophy, Case Western Reserve University, 2014, EECS - Computer Engineering
Due to multiple untrusted components in integrated circuits (ICs) life cycle, malicious modifications of integrated circuits in design houses or foundries have emerged as a major security threat. Such modifications, popularly referred to as Hardware Trojan attacks, are extremely difficult to detect during manufacturing test. Effectiveness of traditional logic testing and side-channel analysis based detection approaches are limited by their capability in meeting complex Trojan trigger conditions and the masking effect due to large process variations, respectively. In this thesis, we analyze hardware Trojan attacks of various forms from both an attacker's and a defender's perspectives, with the final goal of developing effective defense mechanisms to thwart Trojan attacks and protect ICs security. From an attacker's point of view, we explore the design space of hardware Trojan by developing innovative and efficient Trojan design techniques at different stages of IC development. Hardware Trojans
are designed and implemented to cause system malfunction and critical information
leakage. Novel circuit level design techniques are investigated for minimizing Trojan side-channel fingerprint. A new class of hardware Trojans is proposed that can be mounted in Static-Random-Access Memories (SRAMs) to tamper data integrity in embedded memories (e.g. processor cache), which also validates the feasibility of mounting general hardware Trojan attacks in foundries by manipulating design layouts. As effective defense measures, we propose two robust side-channel analysis based Trojan detection approaches that do not require a golden IC instance thus eliminate process noises. Finally, as a Design-for-Security (DfS) technique, the concept of Infrastructure IP for Security (IIPS) is proposed and implemented to provide
comprehensive protections against various forms of hardware attacks. Both circuit-level simulations and experimental results are provided demonstrate the effec (open full item for complete abstract)
Committee: Swarup Bhunia (Advisor); Christos Papachristou (Committee Member); Francis Merat (Committee Member); Andy Podgurski (Committee Member)
Subjects: Computer Engineering