Master of Science (M.S.), University of Dayton, 2015, Electrical Engineering

This Thesis describes a communication system to allow for the transmission of data between a host computer and a DE2-115 FPGA board over an Ethernet connection. This is achieved by using a socket between the host computer and a NIOS II embedded processor that accepts the data from the host computer and transfers it to the FPGA fabric. The host computer uses a C++ program to open a file and send the data over the socket to the NIOS II processor. The NIOS II acts as memory controller for the Synchronous Dynamic Random Access Memory (SDRAM) on the board with separate input and output data sections for the Hardware Description Language (HDL) processing module. A HDL module then processes the data and sends it back to the NIOS II to be returned to the host computer over the socket. The data transfer system is tested with three basic image processing functions performed on three sample images to verify its functionality. This data transfer system allows for easier testing of digital designs on the DE2-115 board by providing test data to the digital design in an efficient manner.

Committee: Eric Balster Ph.D. (Committee Chair); John Weber Ph.D. (Committee Member); Tarek Taha Ph.D. (Committee Member) Subjects: Electrical Engineering

Doctor of Philosophy, The Ohio State University, 2006, Computer and Information Science

In the past decade several high-speed networks have been introduced, each superseding the others with respect to raw performance, communication features and capabilities. However, such aggressive initiative is accompanied by an increasing divergence in the communication interface or "language" used by each network. Accordingly, portability for applications across these various network languages has recently been a topic of extensive research. Programming models such as the Sockets Interface, Message Passing Interface (MPI), Shared memory models, etc., have been widely accepted as the primary means for achieving such portability. This dissertation investigates the different design choices for implementing one such programming model, i.e., Sockets, in various high-speed network environments (e.g., InfiniBand and 10-Gigabit Ethernet). Specifically, the dissertation targets three important sub-problems: (a) designing efficient sockets implementations to allow existing applications to be directly and transparently deployed on to clusters connected with high-speed networks; (b) analyzing the limitations of the sockets interface in various domains and extending it with features that applications need but are currently missing; and (c) designing a communication substrate to allow compatibility between various kinds of protocol stacks belonging to a common network family (e.g., Ethernet). The proposed stack comprising of the above mentioned three components, allows development of applications and other upper layers in an efficient, seamless and globally compatible manner.

Committee: Dhabaleswar Panda (Advisor) Subjects:

Master of Science (MS), Ohio University, 1992, Mechanical Engineering (Engineering)

The finite element analysis of apex thin and thick walled hexagonal drive tool sockets

Committee: Jay Gunasekera (Advisor) Subjects: Engineering, Mechanical