Master of Science (M.S.), University of Dayton, 2015, Electrical Engineering

Intrusion Detection Systems (IDS) are intelligent specialized systems designed to interpret intrusion attempts from incoming network traffic. IDSs aim at minimizing the risk of accessing unauthorized data and potential vulnerabilities in critical systems by examining every packet entering a system. Packet inspection and Pattern matchings are often computationally intensive processes and that are the most power hungry functionalities in network intrusion detection systems. This thesis presents a high throughput, low latency and low power memristor crossbar architecture for packet header and payload matching that could be used for high-speed packet classification and malware detection. The memristor crossbar systems can perform intrusion detection through a brute force approach for static contents/signatures and a state machine approach for regular expressions. A large portion of the work completed in this thesis has been published in [1-2].

Committee: Tarek Taha Dr (Advisor); Eric Balster Dr (Committee Member); Vamsy Chodavarapu Dr (Committee Member) Subjects: Computer Engineering; Electrical Engineering