Master of Science in Computer Engineering, University of Dayton, 2019, Electrical and Computer Engineering

As aircraft turbine engine technologies have evolved, a need has emerged to move from legacy monolithic control systems to a distributed paradigm. This thesis is based upon research performed to develop a distributed control architecture that is secure and robust against extreme environmental conditions. Background, the proposed architecture, design of a network smart node, and experimental testing of a high-temperature microprocessor are presented.

Committee: Vamsy Chodavarapu Ph.D. (Committee Chair); Michael Wicks Ph.D. (Advisor); Guru Subramanyam Ph.D. (Committee Member) Subjects: Computer Engineering; Electrical Engineering

MS, University of Cincinnati, 2014, Engineering and Applied Science: Computer Engineering

Today embedded systems are found in all areas of our lives and have many different applications. They differ in their uses and properties as well as employing both software and hardware components in their implementations. This has made the design and development process for them much more complicated. Learning to use such a process is especially difficult for electrical engineering students, who have not been introduced to the systematic design and testing methodologies familiar to students trained in computer science and computer engineering. In this thesis, we illustrate the similarities and differences in the design and development design processes in for software systems and for software/hardware embedded systems. We give details for every stage for both types of systems and we develop detailed examples for example embedded systems, using a design process which extends the standard UML-based process used for software. In addition, we include details about project management. The examples and additional exercises and questions provide a set of tutorials which will assist students unfamiliar with complex design procedures in mastering the necessary skills to become well-trained embedded system developers.

Committee: Carla Purdy Ph.D. (Committee Chair); Raj Bhatnagar Ph.D. (Committee Member); George Purdy Ph.D. (Committee Member) Subjects: Computer Engineering

MS, University of Cincinnati, 2022, Engineering and Applied Science: Computer Engineering

Software defined radio (SDR) provides significant advantages over traditional analog radio systems and are becoming increasingly relied on for ”mission critical” applications. This along with risk of trojans, single-event upsets and human error creates the necessity for fault tolerant systems. Redundancy has been traditionally used to implement fault tolerance but incurs a substantial area overhead which is undesirable in most applications. Advancements in field-programmable gate array and system on a chip technologies have made implementing machine learning (ML) algorithms within embedded systems feasible. In this thesis we explore the use of ML to implement fault tolerance in an SDR. Our approach, which we call adaptive component-level degeneracy (ACD), uses a ML model to learn the functionality of an SDR component. Once trained, the model can detect when the component is compromised and mitigate the issue with its own output. We demonstrate the ability of our model to learn multiple simulated SDR components. We compare the one-dimensional convolutional neural network and bidirectional recurrent neural network architectures at modeling time series components. We also implement ACD within a real-time SDR system using GNU Radio Companion. The results show great potential for the utilization of ML techniques for improving embedded system reliability.

Committee: Rashmi Jha Ph.D. (Committee Member); Temesguen Messay Kebede Ph.D. (Committee Member); David Kapp PhD (Committee Member); John Emmert Ph.D. (Committee Member) Subjects: Computer Engineering

PhD, University of Cincinnati, 2019, Engineering and Applied Science: Electrical Engineering

Embedded systems are at the forefront of everyday life, being utilized in smart devices, such as cell phones and internet of things (IoT), devices around the home, as well as the latest components in aerospace and automobile technology. Reliance on these devices is critical to the current day to day operations of society, and these devices are required to be secure and reliable to maintain the safety of those who depend on them. Among these devices, trusted safety critical embedded systems are rigorously designed with security and reliability so they can be counted on to perform their assigned responsibilities with a low probability of failure, as such a failure could cost people their lives in the worst case scenario. Trusted embedded systems are often developed with hardware, using the latest in field programmable gate arrays (FPGA), and integrated circuits (ICs), as hardware development has a long established process for producing high quality, fault tolerant systems and reporting performance in a standardized way. The processes utilized are mature and repeatable, and this shows the reliability of these systems is consistent. These systems have increased in complexity, performing more and more tasks with each incremental increase in hardware performance. Unfortunately the end to Moore's Law is coming, and though the development of new architectures and techniques has allowed for the end to be delayed, a shift in design is required to continue increasing the complexity of trusted embedded systems. Software is being looked at to continue the trend of complex, high performance systems, but suffers from its utilization in modern, agile development environments and the use of unreliable metrics for reliability. Therefore, software is not currently always suitable for integration into safety critical systems, and requires a new, encompassing development procedure that utilizes techniques and metrics to allow it to be used in hardware/software solutions. This dissertati (open full item for complete abstract)

Committee: Carla Purdy Ph.D. (Committee Chair); Wen-Ben Jone Ph.D. (Committee Member); Daniel M. Peairs Ph.D. (Committee Member); Ranganadha Vemuri Ph.D. (Committee Member); Philip Wilsey Ph.D. (Committee Member) Subjects: Computer Engineering

Doctor of Philosophy, The Ohio State University, 2006, Computer and Information Science

Recent advances in semiconductor technology have resulted in techniques that can build miniaturized radios and sensor-actuators, which can be deployed in the physical world in a large scale. These inexpensive devices can be used to provide coordinated dense sensing, processing, and communicating. Combining these capabilities with robust system software will empower physical sciences with real-time data of high fidelity. To realize this opportunity, computer scientists must address new challenges posed for development of robust system software for the large scale resource constrained wireless networks of embedded devices (sensors). These devices have limited resources in terms of processing, memory, radio bandwidth, and energy. Further, once deployed these devices will necessarily remain untouched and expect to work for an extended period of time. All though Internet is a large scale network, all of the above mentioned constrained do not apply to the nodes in the Internet. Therefore, network services must be designed specifically for the large scale wireless sensor networks. The network services for large scale sensor network must have low time complexity and memory complexity. We provide low complexity reliable and secure data transport for large scale wireless networks of embedded devices. We focus on bulk data transport for two of the most commonly used services, viz. data dissemination and data collection. Our services are better than the state-of-the-art. We address the problem of key maintenance for providing secured communication in the presence of key compromise and denial-of-service attacks. We also investigate the use of testbed to facilitate experimentations for large scale wireless networks.

Committee: Anish Arora (Advisor) Subjects: Computer Science

Master of Science, The Ohio State University, 2024, Computer Science and Engineering

With the rise of car infotainment systems, the integration of smartphones with in-car displays has become increasingly prevalent. CarPlay, as one of the popular systems, is highly favored by users and is equipped in many vehicles. The Magic Brand Magic Box is an innovative Android-based device designed to interface with a car's CarPlay-enabled USB port, enabling the projection of its own user interface onto the car's display. However, this capability raises significant safety concerns, as it allows activities typically restricted while driving, such as watching videos on car screens. This thesis aims to reverse engineer the Magic Box to understand the mechanisms by which it communicates through the CarPlay interface. By analyzing the device's hardware and software, as well as referencing partial CarPlay protocol documents found online, we seek to uncover the principles behind its functionality and explore potential vulnerabilities in the Apple CarPlay system that may have been exploited. We aim to provide a detailed insight into the process of Android reverse engineering, offering valuable knowledge for researchers and practitioners interested in similar endeavors.

Committee: Keith Redmill (Advisor); Zhiqiang Lin (Advisor) Subjects: Computer Engineering; Computer Science

Master of Science in Engineering, Youngstown State University, 2023, Department of Electrical and Computer Engineering

This thesis delves into the firmware development of a custom Bluetooth Low Energy (BLE) Sensor Peripheral. The sensor peripheral is designed to o↵er a variety of low power sensing options. A review of BLE and applications is presented. The custom SensorTag incorporates three unique sensors: an accelerometer, 4-in-1 gas sensor, and an analog front end. These sensors will be analyzed and previous research applications will be discussed. A comprehensive analysis of the firmware development will be given throughout this paper. A brief overview of the phone application is provided. Finally, a discussion of the practical applications of the custom board will be given, including corrosion and protein detection.

Committee: Frank Li PhD (Committee Chair); Vamsi Borra PhD (Committee Member); Pedro Cortes PhD (Committee Member) Subjects: Electrical Engineering; Engineering

Master of Science in Engineering, Youngstown State University, 2023, Department of Electrical and Computer Engineering

This research document presents the development of a fully digital controller embedded on a Field Programmable Gate Array (FPGA) for a 50 kW induction heater. The document explores the fundamentals of induction heaters and resonant tank circuits, the operation of the half-bridge inverter unit, and the implementation of phase control techniques. In addition to providing simulation results and a comparative analysis of simulation and hardware implementations, this study demonstrates the practical implications of the developed controller. The research affirms the effective functionality of the fully implemented embedded controller in real-world applications.

Committee: Frank Li PhD (Advisor); Vamsi Borra PhD (Committee Member); Ghassan Salim MS (Committee Member) Subjects: Electrical Engineering

Master of Science in Cyber Security (M.S.C.S.), Wright State University, 2019, Computer Engineering

In the growing world of cybersecurity, being able to map and analyze how software and hardware interact is key to understanding and protecting critical embedded systems like the Engine Control Unit (ECU). The aim of our research is to use our understanding of the ECU's control flow attained through manual analysis to automatically map and identify sensor functions found within the ECU. We seek to do this by generating unique sets of feature vectors for every function within the binary file of a car ECU, and then using those feature sets to locate functions within each binary similar to their corresponding control function. This feature algorithm is used to locate candidate functions that utilize a sensor, and then examine the structure of each of these candidate functions to approximate the memory-mapped IO address of each sensor. This method was able to successfully locate 95\% of all candidate functions and was able to successfully recover 100\% of likely sensor addresses within each of those functions.

Committee: Junjie Zhang Ph.D. (Advisor); Jack Jean Ph.D. (Committee Member); Meilin Liu Ph.D. (Committee Member) Subjects: Computer Engineering; Computer Science

MS, University of Cincinnati, 2018, Engineering and Applied Science: Electrical Engineering

Modern automobiles are heavily integrated with various embedded devices for wide range of applications. This necessitates a secure and reliable communication network among these embedded devices. CAN bus is currently being used in most automobiles over the past two decades. However, several researchers have demonstrated that compromising the security of the automobile system is feasible by utilizing the vulnerabilities in the embedded device firmware and integration code and then advancing these errors to part or whole of the system through the CAN bus. The limitations of CAN bus arise due to inability to accommodate the recent advancements in cryptography and cyber security solutions because CAN bus was developed before the cyber revolution became widespread. Several researchers have proposed various solutions to address the security issues of the CAN bus. The two main approaches are either to implement signal analysis to identity the faulty messages or to develop an advanced CAN bus to accommodate the emerging cyber security algorithms. However, these solutions are either hardware intensive and cause time delays or are not compatible with the already existing automobile CAN bus systems. Our work proposes a hierarchical partitioning and encapsulation based model system that provides a security layer above the CAN interface. The proposed model allows for early detection of malicious messages and unauthenticated accesses. The approach does not demand complex hardware requirement. As the model accommodates the existing CAN network and does not require hardware changes, it is backwards compatible to the present automobile systems already being used. It is a cost effective and customizable way to accommodate additional user requirements within the pre-set security framework.

Committee: Carla Purdy Ph.D. (Committee Chair); Chia Han Ph.D. (Committee Member); Ali Minai Ph.D. (Committee Member) Subjects: Electrical Engineering

MS, University of Cincinnati, 2017, Engineering and Applied Science: Computer Engineering

With embedded systems technology growing rapidly, communication between MCUs, SOCs, FPGAs, and their peripherals has become extremely crucial to the building of successful applications. The ability for designers to connect and network modules from different manufacturers is what allows the embedded computing world to continue to thrive and overcome roadblocks, driving us further and further towards pervasive and ubiquitous computing. This ability has long been afforded by standardized communication protocols developed and incorporated into the devices we use on a day-to-day basis. This thesis aims to explain to an undergraduate audience and to implement the major communication protocols that are used to exchange data between microcontrollers and their peripheral modules. With a thorough understanding of these concepts, students should be able to interface and program their microcontroller units to successfully build projects, giving them hands on experience in embedded design. This is an important skill to have in a field in which configuring the electronics and hardware to work correctly is equally as integral as writing code for the desired application. The protocols that are discussed are the three main serial communication protocols: I2C (inter-integrated circuit), SPI (serial peripheral interface), and TTL UART (universal asynchronous receiver transmitter). BLE (Bluetooth low energy) is also explored to try and help students add cheap wireless functionality to their designs. In order to successfully put forth and apply the concepts, this thesis uses the Arduino Uno R3 (Atmel ATmega328 microcontroller) and the mikromedia for PIC24EP (PIC24EP512GU810 microcontroller) boards. On the Arduino, we use high level functions afforded by library support to go through the steps of implementing and using the UART, SPI, and I2C serial communication protocols. For the PIC, we write our own functions to write the protocols from scratch using registers in the hardware comm (open full item for complete abstract)

Committee: Carla Purdy Ph.D. (Committee Chair); Rui Dai Ph.D. (Committee Member); Wen-Ben Jone Ph.D. (Committee Member) Subjects: Computer Engineering

Master of Science (MS), Ohio University, 2016, Environmental Studies (Voinovich)

The efficiency of watershed management depends on the frequency of monitoring water quality. Remote water quality monitoring can improve watersheds management. However, this is often very costly and difficult to implement. This study focused on designing and building a low cost remote water quality monitoring system. This was achieved by integrating low cost computing technology, power management, monitoring sensors and `disruption tolerant networking' (DTN). This system was used to measure water pH, electrical conductivity and temperature. The composite system is made up of three main components which includes the data acquisition node, communication module and the cloud database. The data acquisition node is made up of the sensor nodes which includes pH, conductivity and temperature sensors, credit-card sized computer and microcontroller. A side-by-side test between the low cost water quality monitoring system and a reference YSI 600 XLM sonde was conducted to demonstrate the effectiveness of the low cost system.

Committee: Natalie Kruse (Advisor) Subjects: Communication; Environmental Management; Information Systems; Information Technology

MS, University of Cincinnati, 2011, Engineering and Applied Science: Computer Engineering

Embedded systems are ubiquitous and have a large number of applications. The requirements for embedded systems are not restricted to functionality but also include a lot of non-functional properties such as cost, reliability, safety, ease of use etc. This makes developing a standard design methodology for embedded systems challenging. In this thesis, we are attempting to include the non-traditional, non-functional constraints of embedded systems in the design process by weighting them in the order of their importance. We propose developing UML models for a system and annotating them with the non-functional constraints by using standard profile extensions and weighted constraint charts. We demonstrate the application of this design technique by developing a few example systems. One of the systems is implemented on Altera UP3 platform and demonstrates how the design technique leads us to choose the implementation that satisfies all the requirements, including the ones that are non-functional.

Committee: Carla Purdy, PhD (Committee Chair); Philip Wilsey PhD (Committee Member); Xuefu Zhou PhD (Committee Member) Subjects: Computer Engineering

MS, University of Cincinnati, 2011, Engineering and Applied Science: Computer Engineering

Embedded systems today play a significant role in all aspects of our lives ranging from critical medical applications to multi-purpose handheld devices to simple room temperature controls. Unfortunately, due to their ubiquity and characteristic features, embedded systems are prone to various security attacks. Software based security attacks, which target security loopholes in operating system and application software, are the most common security attacks because of their relatively easy and cost effective implementation. Hence it's important for embedded system designers and application developers to have knowledge about existing security attacks so as to avoid them in their design. We survey various embedded system security attacks and present a detailed description for a class of software based security attacks, buffer overflow attack. We demonstrate a stack based buffer overflow attack using the Altera Nios II softcore processor and the Micrium MicroC/OS II RTOS kernel. We also present a method to prevent such an attack for this specific system. This method can be modified to apply to a wide range of embedded systems products

Committee: Carla Purdy PhD (Committee Chair); Yiming Hu PhD (Committee Member); George Purdy PhD (Committee Member) Subjects: Computer Engineering

PhD, University of Cincinnati, 2008, Engineering : Computer Science and Engineering

Integrated Circuits (ICs) are widely used in all applications and industries like smart cards, cell phones, set-top boxes, automobiles, avionics, space exploration and bio-instrumentation, to name a few. Traditional IC design flows and architectural synthesis techniques have been developed primarily for area, power and performance optimization. In recent years, as we move into the nanometer semiconductor process era, the ability to integrate large and complex applications on a single semiconductor die coupled with the all pervasive nature of the technology and its impact on our daily lives, have brought into prominence two important IC optimization constraints: Security and Correctness. In this thesis, we have developed novel architectural synthesis techniques at cell-level, circuit-level and algorithmic-level, in a hierarchical standard-cell-based IC design framework, to design correct and secure ICs. Formulation as a hierarchical framework allows efficient partitioning of the design problem into several clearly-defined design steps at various levels of abstractions, with a clear understanding of each design step and ability to incorporate the requirements of subsequent design steps. Furthermore, unlike naive security-centric IC design flows where security and IC implementation constraints (area, power and performance) are typically considered as orthogonal and often conflicting optimization goals, in this thesis, we developed a novel paradigm that could be used to simultaneously optimize security as well as IC implementation constraints (area and power), at various hierarchical levels of IC design. Together, these architectural synthesis techniques fit well in today's highly productive modular IC design flows, and thus efficiently design correct and secure ICs.

Committee: Ranga Vemuri PhD (Committee Chair); Jintai Ding PhD (Committee Member); Karen Tomko PhD (Committee Member); Harold Carter PhD (Committee Member); Wen-Ben Jone PhD (Committee Member) Subjects: Computer Science

Doctor of Philosophy, The Ohio State University, 2007, Food, Agricultural, and Biological Engineering

Advancements in sensing and monitoring of air quality parameters within confined animal feeding operations have been realized through the application of embedded systems and advanced networking. The development of an embedded vibration sensor to detect the presence of ventilation fan activity provided researchers with an improved method to monitor ventilation from high capacity CAFO facilities. Experiments revealed over estimation errors common to the majority of passive ventilation sensors. Analysis of ventilation sensor systems resulted in proposed limits to overall measurement error by minimizing the modulus of fan on-time and sampling time. Controller Area Networks were found to be a viable means to link multiple analog and digital sensors through a multi-master based embedded network. It was found that signal attenuation was significant as bus lengths increased to a maximum of 600 meters. This attenuation was counteracted by reducing the baud rate of the communication and allowing for longer bit times. Signal reflection of the individual bits was another major factor of transmission error caused by the mismatch of impedance between the signal wire and the termination resistor. Wireless sensor networks were also evaluated for their potential to act as the data communication network within a multi-point sampling system inside a CAFO. Results from experimental path loss studies found many factors including antenna orientation, enclosure thickness, free space, antenna height, animal cages, and concrete floor separations to all be statistically relevant factors in determining the overall system path loss. It was further found that linear separation within an aisle and number of cage separations provided the highest levels of signal attenuation. A model was developed to predict the path loss at any point within a poultry layer facility based on the aisle and cage separation terms. The model was able to predict 86% of the system variability and was able to produce an (open full item for complete abstract)

Committee: Lingying Zhao (Advisor) Subjects: Engineering, Agricultural

Master of Science (MS), Ohio University, 2010, Electrical Engineering (Engineering and Technology)

This thesis presents the design, development, and experimental verification of an embedded vehicle controller applied to a hovering small unmanned aerial system dubbed the UFO. The effort demonstrated the feasibility of implementation of advanced nonlinear controller designs in embedded hardware to achieve increased system performance. Furthermore, it was shown that the controller implementation was not penalized due to size, weight, and power build-up typically associated with vehicles in this class. Performance was verified experimentally through simulation case studies that subjected the vehicle and embedded controller to various real-world considerations. Finally, justification of approach occurred through analysis of the experimental results.

Committee: J. Jim Zhu (Advisor) Subjects: Electrical Engineering; Engineering

Master of Science (M.S.), University of Dayton, 2012, Electrical Engineering

Image compression standards continually strive to to achieve higher compression ratios while maintaining image quality. In addition to these goals, new applications require expanded features and flexibility as compared to existing compression standards. JPEG2000 is the latest in the line of image compression standards, offering higher compression ratios than its predecessor JPEG while maintaining comparable image quality. In addition, JPEG2000 offers an extended range of features including bit-rate control, region of interest coding and file-stream scalability with respect to resolution, image quality, components and spatial region. However, these additional features come with associated costs, primarily in the form of computational complexity. Due to the increased computational costs, JPEG2000 has not achieved the same wide-spread usage as JPEG. However, there are a number of specialized applications such as medical imaging and wide-area surveillance which demand the extended features offered by JPEG2000. These applications generally deal with high resolution imagery, resulting in extremely long encoding times when using consumer off the shelf platforms. As a result, many hardware implementations of the most computationally complex portions of JPEG2000, namely Tier I encoding, have been proposed. This thesis proposes using an embedded soft-core processor on a Field Programmable Gate Array (FPGA) for JPEG2000 code stream organization, known as Tier II. The soft-core processor chosen, Altera's NIOS II core, is coupled with existing Discrete Wavelet Transform (DWT) and Tier I implementations on a single FPGA to realize a fully embedded JPEG2000 encoder. Results show the feasibility of using an embedded soft-core processor on a FPGA to perform Tier II processing for JPEG2000.

Committee: Eric Balster PhD (Committee Chair); John Weber PhD (Committee Member); Frank Scarpino PhD (Committee Member) Subjects: Computer Engineering; Electrical Engineering

Doctor of Engineering, Cleveland State University, 2011, Fenn College of Engineering

As embedded systems embrace ever more complicated microcontrollers, they present both new capability and new complexity. To simplify their development, some lessons of computer application development will translate with additional work. This thesis offers one such translation. It shows how whole-program compilers - those that broadly analyze a program's entire source code - can achieve performance gains and remove faults in embedded system applications. In so doing, this yields a novel stackless threading system named UnStacked C. UnStacked C enables cooperative multithreading without the risk of stack overflows in embedded system applications. We also propose a novel preemption system called Lazy Preemption. Unstacked C with Lazy Preemption enables stackless preemptive multithreading in embedded systems. These remove the possibility of thread stack overflows, but also significantly reduces the memory required for multithreading in embedded systems.

Committee: Nigamanth Sridhar PhD (Committee Chair); Yongjian Fu PhD (Committee Member); Janche Sang PhD (Committee Member); Dan Simon PhD (Committee Member); Wenbing Zhao PhD (Committee Member) Subjects: Computer Engineering; Computer Science; Electrical Engineering; Engineering

Doctor of Philosophy, Case Western Reserve University, 2009, EECS - Computer Engineering

In order to provide security in ubiquitous, passively powered systems, especially RFID tags in the supply chain, improved asymmetric key cryptographic processors are presented, tested and compared with others from the literature. The proposed processors show a 12%-20% area and a 31%-45% time improvement. A secure protocol is also presented to minimize cryptographic effort and communication between tag and reader. A set of power management techniques is also presented to match processor performance to available power, resulting in greater range and responsiveness of RFID tags.

Committee: Christos Papachristou PhD (Committee Chair); Francis L. Merat PhD (Committee Member); Swarup Bhunia PhD (Committee Member); Xinmiao Zhang PhD (Committee Member); Francis G. Wolff PhD (Committee Member) Subjects: Computer Science; Electrical Engineering