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Design and Implementation of a 16-Bit Flexible ROM-less Direct Digital Synthesizer in FPGA and CMOS 90nm Technology

Dommaraju, Sunny Raj
http://rave.ohiolink.edu/etdc/view?acc_num=wright1374351629

Abstract Details

2013, Master of Science in Engineering (MSEgr), Wright State University, Electrical Engineering.
A ROM-less direct digital synthesizer architecture is presented in this thesis. This architecture eliminates the ROM-based phase to sine wave amplitude converter, which is a bottleneck for pushing clock frequencies into the gigahertz range. The design consists of a 16-bit phase accumulator, a set of 18 band pass finite impulse response filters, a 12-bit digital to analog converter and a low pass filter to produce a sine wave with output frequencies ranging from 36 MHz to 72 MHz with a resolution of 3.05 kHz and a 55 dB spur free dynamic range. The same hardware can be used to achieve output frequency ranging from hertz to gigahertz and a 191 Hz resolution by changing the clock frequency. A resolution of 0.05 Hz can be achieved by using a 32-bit phase accumulator. The average phase noise obtained was -87 dBc/Hz at 100 kHz offset, -118 dBc/Hz at 1 MHz offset and -151 dBc/Hz at 5 MHz offset. This design was implemented on Virtex-6 FPGA. The analysis results of FPGA data show that the proposed design is an effective alternative. An ASIC design was also implemented in CMOS 90nm technology to reach higher frequency ranges.
Saiyu Ren, Ph.D (Advisor)
Raymond E. Siferd, Ph.D (Committee Member)
Chein-In Henry Chen, Ph.D (Committee Member)
R.William Ayres, Ph.D (Other)
75 p.
Design; Education; Electrical Engineering; Systems Design; Technology
Direct Digital Synthesizer, ROM-less, 16-Bit Accumulator, Multiplier-less FIR Filter, Virtex 6 FPGA, CMOS 90nm Technology, Hardware Reuse, Pipe-lined Design, ASIC

Recommended Citations

Citations

  • Dommaraju, S. R. (2013). Design and Implementation of a 16-Bit Flexible ROM-less Direct Digital Synthesizer in FPGA and CMOS 90nm Technology [Master's thesis, Wright State University]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=wright1374351629

    APA Style (7th edition)

  • Dommaraju, Sunny Raj. Design and Implementation of a 16-Bit Flexible ROM-less Direct Digital Synthesizer in FPGA and CMOS 90nm Technology. 2013. Wright State University, Master's thesis. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=wright1374351629.

    MLA Style (8th edition)

  • Dommaraju, Sunny Raj. "Design and Implementation of a 16-Bit Flexible ROM-less Direct Digital Synthesizer in FPGA and CMOS 90nm Technology." Master's thesis, Wright State University, 2013. http://rave.ohiolink.edu/etdc/view?acc_num=wright1374351629

    Chicago Manual of Style (17th edition)

wright1374351629
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© 2013, all rights reserved.
This open access ETD is published by Wright State University and OhioLINK.