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Efficient Logic Encryption Techniques for Sequential Circuits

Kasarabada, Yasaswy V
http://orcid.org/0000-0003-3542-4674
http://rave.ohiolink.edu/etdc/view?acc_num=ucin1613752483402656

Abstract Details

2021, PhD, University of Cincinnati, Engineering and Applied Science: Computer Science and Engineering.
Logic encryption, a prominent solution to the hardware IP security problem, protects a circuit by adding 'encryption' logic to lock the design functionality using a set of newly introduced key inputs. Logic encryption for combinational circuits focuses on adding combinational gates as encryption logic. When encrypting sequential circuits, most techniques advocate the modification of the FSM to either prevent entering normal operation or force the design into corrupted state(s) on the application of a wrong key. Another avenue taken by sequential logic encryption is to lock the scan-chains by inserting key gates on the scan connections between the flip-flops in the circuit to reduce the ability to set and observe the internal state of the circuit. Boolean satisfiability based attack methods are successful in decrypting combinational logic encrypted circuits. Subsequently proposed SAT-resilient techniques are susceptible to other type of attacks like removal, bypass or functional analysis attacks. Although SAT methods can be used to attack sequential circuit using scan chains, this approach is rendered ineffective if the scan chains are absent or are locked using key gates, as described above. Due to these limitations, sequential logic encryption techniques claim SAT-resiliency. One of the goals of this dissertation is to test the validity of this claim by developing SAT-based attack methods that can attack logic encrypted sequential circuits without scan access. Circuit unrolling is a promising technique that is used to develop such an attack method. The decryption efficiency of this attack is evaluated against modern sequential logic encryption techniques. Furthermore, more robust and highly effective encryption techniques to counter the sequential SAT attack method are proposed in this work by analyzing the attributes of the attack that contribute towards its success against other sequential logic encryption schemes. Emphasis is placed on extracting information regarding deep and rarely occurring states from the gate-level netlist of the design which are used to lock the circuit. Three deep or rare state estimation methods and two sequential locking techniques that use these methods are presented in this work. Additionally, a unique logic encryption model that advocates the use of dynamic key sequences instead of static key values to functionally lock the design is also introduced. This represents a call to overhaul the current attack model that is unable to decrypt key sequences and depends on static key values for successfully attacking encrypted circuits. Three methods to generate suitable key sequences are described while additional circuitry that is required to detect and evaluate the correctness of these sequences is embedded into the sequential circuit. All proposed encryption schemes are evaluated for efficiency against the unrolling based SAT attack.
Ranganadha Vemuri, Ph.D. (Committee Chair)
Mike Borowczak, Ph.D. (Committee Member)
John Emmert, Ph.D. (Committee Member)
Wen-Ben Jone, Ph.D. (Committee Member)
Carla Purdy, Ph.D. (Committee Member)
146 p.
Computer Engineering
Logic Encryption; Sequential Circuits; SAT Attack; Circuit Simulation; Model Checking; Dynamic Keys

Recommended Citations

Citations

  • Kasarabada, Y. V. (2021). Efficient Logic Encryption Techniques for Sequential Circuits [Doctoral dissertation, University of Cincinnati]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1613752483402656

    APA Style (7th edition)

  • Kasarabada, Yasaswy. Efficient Logic Encryption Techniques for Sequential Circuits. 2021. University of Cincinnati, Doctoral dissertation. OhioLINK Electronic Theses and Dissertations Center, http://rave.ohiolink.edu/etdc/view?acc_num=ucin1613752483402656.

    MLA Style (8th edition)

  • Kasarabada, Yasaswy. "Efficient Logic Encryption Techniques for Sequential Circuits." Doctoral dissertation, University of Cincinnati, 2021. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1613752483402656

    Chicago Manual of Style (17th edition)

ucin1613752483402656
192
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This open access ETD is published by University of Cincinnati and OhioLINK.