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21024.pdf (3.89 MB)
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Abstract Header
A Novel Simulation Based Approach for Trace Signal Selection in Silicon Debug
Author Info
Komari, Prabanjan
Permalink:
http://rave.ohiolink.edu/etdc/view?acc_num=ucin1468512478
Abstract Details
Year and Degree
2016, MS, University of Cincinnati, Engineering and Applied Science: Electrical Engineering.
Abstract
With the fabrication technology fast approaching 7nm, Post-silicon validation has become an integral part of integrated circuit design to capture and eliminate functional bugs that escape pre-silicon validation. The major roadblock in post-silicon functional verification is limited observability of internal signals in a design. A possible solution to address this roadblock is to make use of embedded memories on chip called trace buffers. The amount of debug data that can be acquired from the trace buffer depends on its width and depth. The width of the trace buffer limits the number of signals that can be traced and the depth of the trace buffer limits the number of samples that can be acquired. Using the acquired data from the trace buffer, the values of other nodes in the circuit can be reconstructed. These trace buffers have limited area, hence only a few critical signals can be recorded by it. In this work we used the simulated annealing heuristic to select trace signals. We developed this idea from the fact that trace signal selection can basically be viewed as a bi-partitioning problem, the set of flip-flops being tapped onto the trace buffer is one partition and the other partition is the set of all other flip-flops in the design. Another key contribution of this thesis is that we found and fixed a hole in the established state restoration algorithm. Experimental results demonstrate that our approach can provide significantly better restoration ratio compared to the state-of-the-art techniques.
Committee
Ranganadha Vemuri, Ph.D. (Committee Chair)
Wen-Ben Jone, Ph.D. (Committee Member)
Carla Purdy, Ph.D. (Committee Member)
Pages
91 p.
Subject Headings
Electrical Engineering
Keywords
VLSI
;
EDA
;
CAD
;
Post Silicon debug
;
Functional Validation
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Refworks
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RIS
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Citations
Komari, P. (2016).
A Novel Simulation Based Approach for Trace Signal Selection in Silicon Debug
[Master's thesis, University of Cincinnati]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1468512478
APA Style (7th edition)
Komari, Prabanjan.
A Novel Simulation Based Approach for Trace Signal Selection in Silicon Debug.
2016. University of Cincinnati, Master's thesis.
OhioLINK Electronic Theses and Dissertations Center
, http://rave.ohiolink.edu/etdc/view?acc_num=ucin1468512478.
MLA Style (8th edition)
Komari, Prabanjan. "A Novel Simulation Based Approach for Trace Signal Selection in Silicon Debug." Master's thesis, University of Cincinnati, 2016. http://rave.ohiolink.edu/etdc/view?acc_num=ucin1468512478
Chicago Manual of Style (17th edition)
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Document number:
ucin1468512478
Download Count:
882
Copyright Info
© 2016, some rights reserved.
A Novel Simulation Based Approach for Trace Signal Selection in Silicon Debug by Prabanjan Komari is licensed under a Creative Commons Attribution-NonCommercial-NoDerivs 3.0 Unported License. Based on a work at etd.ohiolink.edu.
This open access ETD is published by University of Cincinnati and OhioLINK.