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dayton1343737032.pdf (2.25 MB)
ETD Abstract Container
Abstract Header
Design and Implementation of an Embedded NIOS II System for JPEG2000 Tier II Encoding
Author Info
McNichols, John M.
Permalink:
http://rave.ohiolink.edu/etdc/view?acc_num=dayton1343737032
Abstract Details
Year and Degree
2012, Master of Science (M.S.), University of Dayton, Electrical Engineering.
Abstract
Image compression standards continually strive to to achieve higher compression ratios while maintaining image quality. In addition to these goals, new applications require expanded features and flexibility as compared to existing compression standards. JPEG2000 is the latest in the line of image compression standards, offering higher compression ratios than its predecessor JPEG while maintaining comparable image quality. In addition, JPEG2000 offers an extended range of features including bit-rate control, region of interest coding and file-stream scalability with respect to resolution, image quality, components and spatial region. However, these additional features come with associated costs, primarily in the form of computational complexity. Due to the increased computational costs, JPEG2000 has not achieved the same wide-spread usage as JPEG. However, there are a number of specialized applications such as medical imaging and wide-area surveillance which demand the extended features offered by JPEG2000. These applications generally deal with high resolution imagery, resulting in extremely long encoding times when using consumer off the shelf platforms. As a result, many hardware implementations of the most computationally complex portions of JPEG2000, namely Tier I encoding, have been proposed. This thesis proposes using an embedded soft-core processor on a Field Programmable Gate Array (FPGA) for JPEG2000 code stream organization, known as Tier II. The soft-core processor chosen, Altera's NIOS II core, is coupled with existing Discrete Wavelet Transform (DWT) and Tier I implementations on a single FPGA to realize a fully embedded JPEG2000 encoder. Results show the feasibility of using an embedded soft-core processor on a FPGA to perform Tier II processing for JPEG2000.
Committee
Eric Balster, PhD (Committee Chair)
John Weber, PhD (Committee Member)
Frank Scarpino, PhD (Committee Member)
Pages
89 p.
Subject Headings
Computer Engineering
;
Electrical Engineering
Keywords
JPEG2000
;
NIOS II
;
Embedded processing
;
Embedded systems
;
System-on-chip
;
FPGA
;
Image processing
;
Image compression
;
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Citations
McNichols, J. M. (2012).
Design and Implementation of an Embedded NIOS II System for JPEG2000 Tier II Encoding
[Master's thesis, University of Dayton]. OhioLINK Electronic Theses and Dissertations Center. http://rave.ohiolink.edu/etdc/view?acc_num=dayton1343737032
APA Style (7th edition)
McNichols, John.
Design and Implementation of an Embedded NIOS II System for JPEG2000 Tier II Encoding.
2012. University of Dayton, Master's thesis.
OhioLINK Electronic Theses and Dissertations Center
, http://rave.ohiolink.edu/etdc/view?acc_num=dayton1343737032.
MLA Style (8th edition)
McNichols, John. "Design and Implementation of an Embedded NIOS II System for JPEG2000 Tier II Encoding." Master's thesis, University of Dayton, 2012. http://rave.ohiolink.edu/etdc/view?acc_num=dayton1343737032
Chicago Manual of Style (17th edition)
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Document number:
dayton1343737032
Download Count:
2,257
Copyright Info
© 2012, all rights reserved.
This open access ETD is published by University of Dayton and OhioLINK.