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Degree

Master of Science in Engineering (MSEgr), Wright State University, Electrical Engineering, 2008.

Abstract

Over the past two decades frequency synthesizer has progressed from a relatively crystal bank synthesizer to multi-loop phase locked loops. But in recent years direct digital synthesizers (DDS) have witnessed an increase in demand over their analog counterparts. The DDS offers a wide range of advantages over phase locked loops such as high frequency range, fast switching response, and sub-hertz frequency resolution. However, the conventional DDS suffers limitations due to its architecture involving digital-to-analog converter (DAC) and read-only-memory (ROM) with respect to high clock speeds.

The Pulse Output Direct Digital Synthesizer (PODDS) presented in this thesis eliminates the necessity for a DAC and ROM, and replaces the phase conversion block present in the conventional DDS with an Analog filter bank to generate the sine wave. The PODDS operates at a frequency of 2.25GHz, with a 16-b phase accumulator designed using carry look-ahead adder. The analog filter bank was designed using an array of low-pass Chebyshev filters. A frequency range of 1.1 MHz to 1.125GHz was achieved with average power consumption of 83mW.

Subject Headings

Electrical engineering

Keywords

DDS; Rom-less DDS

Committee / Advisors

Raymond Siferd, PhD (Advisor)
Chien-In Henry Chen, PhD (Committee Member)
Marian Kazmierczuk, PhD (Committee Member)

Pages

62p.

Document number: wright1215482245
Permalink: http://rave.ohiolink.edu/etdc/view?acc_num=wright1215482245

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