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Hardware encryption of AES algorithm on Android platform

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Degree
MS, University of Cincinnati, Engineering and Applied Science: Computer Engineering, .
Abstract

Mobile devices have revolutionized the world more than any other technology could have ever done. They have become an all purpose device performing numerous functions, thus eliminating the need of carrying multiple devices. In today’s world mobile phones are seen more as a necessity than a luxury. It has changed the way people communicate with one another, allowing almost everyone to speak to anyone else no matter where they are. In 1999, only 8 percent of the world population had mobile phone subscriptions. By 2007, this figure increased to 49 percent and today 77 percent of the world’s population has mobile phone subscription, out of which 10 percent are Smartphone users.

Smartphone is the category of mobile phones which has higher processing power and third party application support. In addition to the basic phone functions, Smartphone can be used to surf the web, listen to music, capture images, shoot videos and even play games. Gone are the days when it was necessary to carry cash and check for money transaction. In recent years this medium has been replaced by credit card, which will eventually be replaced by mobile transactions.

The market of Smartphone has evolved over a period of time and data security has now become a major concern. The use of Smartphone for online transactions has made it necessary to provide greater security to these handheld devices. As of now, secure data exchange on these devices is dependent on software implementation of cryptographic algorithms. To make the process robust, it becomes necessary to add this stage of security at hardware level itself.

This research proposes a space and power efficient hardware model of 128-bit Advanced Encryption Standard (AES), which can be distributed as secure digital (SD) card and incorporate plug and play capability. This implementation fits in low cost Spartan 3 XCS1500 Field Programmable Gate Array (FPGA). It operates at 1020 MHz or 710 MHz and produces a throughput of 1099 and 710.9 Mbps. At 1020MHz it consumes 8.5nJ energy per operation cycle and at 710 MHz it consumes 10.5nJ of energy per cycle.

Subject Headings
Computer Engineering
Keywords
Hardware Encryption; AES-128 bit; Android platform; FPGA Encryption; Smartphone Security; Secure Mobile Transactions
Committee / Advisors
Philip Wilsey, PhD (Committee Chair)
Fred Beyette, PhD (Committee Member)
Carla Purdy, PhD (Committee Member)
Pages
75p.

Document number: ucin1342731146
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