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Degree

MS, University of Cincinnati, Engineering : Computer Engineering, 2006.

Abstract

A mixed technology FPGA (MT-FPGA) extends the positive aspects of conventional FPGAs into the non-conventional technologies like photonic, MEMS and RF systems. The results obtained from the first generation MT-FPGA architecture showed that by proper integration of the non-conventional technologies with the programmable FPGA architecture, the benefits associated with conventional FPGAs could be extended to the development of mixed-technology systems. The four principal components of the MT-FPGA are the multi-technology logic cluster (MTLC), the multi-technology block (MTB), the switch block and the I/O block. In this thesis, we are concerned the development of a second generation I/O module for the MT-FPGA. An attempt has been made to design the new I/O with increased flexibility when compared to the first generation I/O module. Also a number of novel features like dedicated clocks for signal sampling, unity gain analog buffers for processing analog signals and tri-state inverters at the I/O output have been incorporated in the second generation I/O. This I/O module has been incorporated in the design of the second generation MT-FPGA which has been fabricated using TSMC 0.25 ìm deep sub-micron process technology. The results obtained by testing the I/O module in coordination with the other MT-FPGA components have been summarized. Also, as part of this thesis, we have developed a signal flow indicator tool to predict the direction of signal flow within the second generation MT-FPGA. This tool also reports any programming errors present in a particular bit-stream configuration. The results obtained by running this tool against many benchmarks are also summarized.

Advisor

Dr. Fred R Beyette

Pages

145p.

Document number: ucin1156361201
Permalink: http://rave.ohiolink.edu/etdc/view?acc_num=ucin1156361201

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