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Degree

PhD, University of Cincinnati, Engineering : Electrical Engineering, 2004.

Abstract

In the last and present decade, Field Programmable Gate Arrays (FPGAs) have made a profound impact on the electronics and communication industry. Though the FPGA has revolutionized programmable/ reconfigurable digital logic technology, one limitation of current FPGAs is that the user is limited to strictly electronic designs. Thus, they are not suitable for applications that are not purely electronic, such as optical communications, photonic information processing systems and other multi-technology applications (ex. analog devices, MEMS devices and microwave components). While a wide variety of multi-technology devices ranging from photonic information processing devices, MEMS devices, telecommunication and digital data processing systems to biological sensors have been implemented, research in this area has for the most part been limited to systems built with application-specific devices. While these designs are well optimized for a specific application, they do not provide the flexibility associated with generically reconfigurable /programmable hardware. As with any Application Specific Integrated Circuit (ASIC), this approach is very costly, and the turn-around time between design iterations may be several months. This approach is not attractive for any multi-technology test-bed systems where the system designer depends on a rapid prototyping/experimentation environment that allows for optimization of processing algorithms and system architecture. The difficulty of using custom designed multi-technology VLSI components is overcome in the present research with the introduction of a Multi-technology Field Programmable Gate Array (MT-FPGA) with innovative system architecture. This new class of field programmable device will extend the flexibility, rapid prototyping and reusability benefits associated with conventional FPGA technology into photonic and other multi-technology domain and give rise to the development of a wider class of programmable and embedded integrated systems. To substantiate the concept of the multi-technology FPGA, two prototype chips are designed fabricated (using AMI 1.5µm CMOS process technology and TSMC 0.35µm deep submicron technology through the MOSIS foundry service) and tested in the two phases of the dissertation research. A user threshold programmable optical block has been incorporated in the new MT-FPGA architecture as a multi-technology block (MTB) and used as a vehicle to successfully demonstrate the multi-technology field programmable capability of the present architecture.

Keywords

FPGA; MULTI-TECHNOLOGY; ARCHITECTURE; CMOS; VLSI; CIRCUIT; PHOTORECEIVER; RECONFIGURABLEE

Advisor

Dr. Fred R. Beyette

Pages

198p.

Document number: ucin1081274672
Permalink: http://rave.ohiolink.edu/etdc/view?acc_num=ucin1081274672

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