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0.18μm phase/frequency detector and charge pump design for digital video broadcasting for handheld’s phase-locked-loop systems

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Degree
Master of Science, Ohio State University, Electrical Engineering, .
Abstract
A Phase/Frequency Detector and Charge Pump design is proposed in this paper. The design is used to be implemented for a frequency synthesizer for digital video broadcasting for hand held devices. The schematic designs of the circuits are implemented using TSMC 0.18μm CMOS technology. Two phase/frequency detector are proposed in this paper to show the effect of the dead zone on the performance of the frequency synthesizer. The main propose of these two PFD is to reach a low p[power consumption and small dead zone which was achieved by the second design where the current consumption is 3.4μA and the dead zone is 20ps. Next this paper will cover the design of a conventional charge pump which uses two 500μA switched current sources to charge up and down a capacitance load. At the end this paper will shows the simulation result of the PFD/CP system in typical situation and also the simulation result using Monte carol method to check the performance of the circuit in nontypical situation like different temperature or supply voltage variation.
Advisor
Mohammed Ismail

Document number: osu1196281141
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