Department: Electrical Engineering ![Remove this limiter [clear]](close-x.png)
100 matches in the database.
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1.
Abdelbagi, Hamdi Eltayib.
SKIN AND PROXIMITY EFFECTS IN TWO PARALLEL PLATES.
Degree: MS, Electrical Engineering, 2007, Wright State University
► Abdelbagi, Hamdi. M.S.Egr., Department of Electrical Engineering, Wright State University, 2007.…
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▼ Abdelbagi, Hamdi. M.S.Egr., Department of Electrical Engineering, Wright State University, 2007. Skin and Proximity Effects in Two Parallel Plates. Time varying currents within winding and core conductors induce magnetic fields. When more than one conductor is present the resultant magnetic field can be found by adding the individual magnetic fields by superposition. The resultant magnetic field in turn induces eddy currents within each electrical component within the vicinity of the resultant magnetic field. Eddy currents flow in the opposite direction of the primary current and increase the resistance by reducing the area in which the primary current has to travel. Eddy currents also reduce the effectiveness of the conductors to conductor high frequency currents. Skin and proximity effects were numerically investigated for two parallel plate conductors while a laminated core was designed to reduce the power losses. Maxwell’s equations were solved to obtain analytical equations for magnetic fields eddy current distribution and power losses. These equations were illustrated in MATLAB for various frequencies to validate the theoretical analysis. Results demonstrate current within an isolated conductor flows near the surface. However, when the same conductor is placed near another conductor the flow path is affected. For the case when the current is flowing in the opposite direction the magnetic fields are added in the area between the conductors and subtracted on the outer side of the conductor. This causes an increase of the current density within the conductor areas, where the conductors are close to each other. This is the proximity effect. The anti-proximity effect occurs when two conductors carry current in same direction. In this case the magnetic fields are subtracted from each other in the area between the conductors and are added to each other in the area outside the conductors resulting in a higher current density in these areas. The eddy currents can be reduced in two ways. Using a highly resistant material for the core increases the skin depth making the distribution of the magnetic flux more uniform. Laminating the core with an oxide film can be used to reduce the eddy current loss as well. The study shows that the eddy current power loss in a sold core is greater than loss in a laminated core by a factor of K2, where K is the number of the sheets in the laminated core.
Advisors/Committee Members: Kazimierczu, Marian K.
Keywords: Electrical Engineerimg; Power Electronics
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2.
Ammanambakkam Nagarajan, Dhivya.
Design of HF Forward Transformer Including Harmonic Eddy Current Losses.
Degree: MS, Electrical Engineering, 2010, Wright State University
► Pulse Width Modulated (PWM) Forward DC-DC converter is a buck-derived isolated power…
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▼ Pulse Width Modulated (PWM) Forward DC-DC converter is a buck-derived isolated power converter which is used extensively in low power to medium power applications. Satisfactory operation of the transformer utilized in forward converter plays a crucial role in the overall operation of the forward converter. Hence detailed analysis pertaining to design of forward transformer is important. The forward transformer is unique as the magnetizing inductance is not required to store magnetic energy. Additionally, the forward transformer has a tertiary winding, which is required to reset the core and to prevent core saturation. This adds to the complexity of design and analysis as compared to a flyback transformer. The effect of winding losses due to High-Frequency (HF) eddy currents caused by harmonics is also considered in this work. Dowell's equation was extended to determine the winding resistances for forward transformer in Continuous Conduction Mode (CCM). The Fourier series of the transformer winding current waveforms are derived. The winding resistances derived based on the Dowell's expression and the current expressions derived based on spectral analysis are employed in evaluating the winding losses. The procedure to design a HF forward transformer in CCM is presented. The effect of harmonics was computed using MATLAB, and verified by circuit simulation with Saber Sketch. The results were found to be in good agreement.
Advisors/Committee Members: Kazimierczuk, Marian K.
Subjects: Electrical Engineering; Electromagnetics; Engineering
Keywords: Forward transformer; Forward converter; Harmonic Losses; Eddy current Losses; high frequency forward transformer design; winding losses
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3.
Arlinghaus, Mark C.
Autopilot Development for an RC Helicopter.
Degree: MS, Electrical Engineering, 2009, Wright State University
► The development of an autopilot system for an RC helicopter presents interesting…
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▼ The development of an autopilot system for an RC helicopter presents interesting challengesfrom both a hardware and controls standpoint. The system detailed in this thesis utilizes a 13 state Extended Kalman Filter (EKF) to fuse sensor data and provide a position/velocity/attitude estimate. A novel, state of the art hybrid PID/LQR controller is developed and compared with a full state Linear Quadratic Regulator (LQR). The hybrid controller uses a proportional position, PID velocity outer loop coupled with an inner loop LQR for attitude control. The entire system is developed and implemented in hardware to produce a functional autopilot. The unit was installed on an Align Trex 600 RC helicopter and demonstrated its ability to hover the helicopter at a desired location. Preliminary investigations have also showed the controller is capable of flying waypoints.
Advisors/Committee Members: Hong, Lang.
Subjects: Electrical engineering; Engineering
Keywords: Autopilot; UAV; EKF; LQR; PID; Helicopter; Unmanned; Control; State Estimation; VTOL
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4.
Avram, Remus C.
A UNIFIED NONLINEAR ADAPTIVE APPROACH FOR THE FAULT DIAGNOSIS OF AIRCRAFT ENGINES.
Degree: MS, Electrical Engineering, 2012, Wright State University
► In this thesis, a fault detection and isolation (FDI) method is developed…
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▼ In this thesis, a fault detection and isolation (FDI) method is developed for aircraft engines by utilizing nonlinear adaptive estimation techniques. Engine sensor faults, actuator faults and component faults are considered under one unified framework. The fault diagnosis architecture consists of a bank of nonlinear adaptive estimators. One of them is the fault detection estimator used for fault detection, and the remaining ones are fault isolation estimators employed to determine the particular fault type/location after fault detection. Each isolation estimator is designed based on the functional structure of a particular fault type under consideration. The FDI architecture has been integrated with the Commercial Modular Aero-Propulsion System Simulation (C-MAPSS) engine model developed by NASA researchers in recent years. Extensive simulation results and comparative studies are conducted to verify the effectiveness of the nonlinear FDI method.
Advisors/Committee Members: Zhang, Xiaodong.
Subjects: Aerospace Engineering; Electrical Engineering
Keywords: fault dignosis; fault detection; fault; abrupt; incipient; aircraft engine; gas-path turbine; fault isolation
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5.
Axtell, Harold Scott.
Characterization and Design of a Completely Parameterizable VHDL Digital Single Sideband Modulator Circuit for Quick Implementation in FPGA or ASIC Electronic Warfare Platforms.
Degree: MS, Electrical Engineering, 2010, Wright State University
► In this work we present the design and characterization of a parameterizable…
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▼ In this work we present the design and characterization of a parameterizable Digital Single Sideband Modulator (DSSM) circuit for use with a Digital Radio Frequency Memory (DRFM) or other signal processing circuits. Field Programmable Gate Arrays (FPGAs) can be used as a prototyping platform for quickly verifying and hardware testing a digital circuit or system. FPGAs can also be used as an implementation platform for a digital circuit or system. A main advantage of FPGAs over that of an Application Specific Integrated Circuit (ASIC) is that it can be quickly (and often dynamically) reprogrammed; whereas an ASIC can take months to fabricate. Currently there is limited capability to quickly and easily generate backend digital signal processing systems for electronic warfare (EW) applications for implementation on an FPGA or an ASIC platform. It is advantageous (especially for dynamically reprogramming FPGAs) for backend EW processing to have parameterizable hardware description language (HDL) code to assist in quickly implementing digital processing capabilities for EW systems. The purpose of this thesis work is to provide just such a capability. We present a completely generic VHDL digital single sideband modulator (DSSM) based on a parameterizable Hilbert Transform (HT). We characterize and test the code so that the user can quickly implement a system to meet their expectations. The entire system is described in VHDL to provide an inexpensive, long term, portable, and parameterizable solution which allows for rapid design and redesign of DSSM circuits. This design is technology portable so it will be viable now and in the future for rapid prototyping, demonstration, and implementation. So as technology changes this code transitions with it. The DSSM via HT rapidly delivers digital circuits for FPGA or ASIC radar or other EW applications.
Advisors/Committee Members: Emmert, Marty.
Subjects: Electrical engineering; Engineering
Keywords: Digital, Single Sideband Modulator, Modulator, Digital, Direct Digital Synthesis, Hilbert Transform, VHDL
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6.
Ayachit, Agasthya.
Small-signal Modeling of Resonant Converters.
Degree: MS, Electrical Engineering, 2011, Wright State University
► Resonant DC-DC converters play an important role in applications that operate at…
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▼ Resonant DC-DC converters play an important role in applications that operate at high-frequencies (HF). Their advantages over those of pulse-width modulated (PWM) DC-DC converters have led to the invention of several topologies over the traditional forms of these converters. Series resonant converter is the subject of study in this thesis. By variation in the switching frequency of the transistor switches, the optimum operating points can be achieved. Hence, the steady-state frequency-domain analysis of the series resonant converter is performed. The operational and characteristic differences between the series resonant and parallel resonant and series-parallel resonant configurations are highlighted. In order to understand the converter response for fluctuations in their input or control parameters, modeling of these converters becomes essential. Many modeling techniques perform analysis only in frequency-domain. In this thesis, the extended describing function method is used, which implements both frequency-domain and time-domain analysis. Based on the first harmonic approximation, the steady-state variables are derived. Perturbing the steady-state model about their operating point, a large-signal model is developed. Linearization is performed on the large-signal model extracting the small-signal converter state variables. The small-signal converter state variables are expressed in the form of the transfer matrix. Finally, a design example is provided in order to evaluate the steady-state parameters. The converter is simulated using SABER Sketch circuit simulation software and the steady-state parameters are plotted to validate the steady-state parameters. It is observed that the theoretical steady-state values agrees with the simulated results obtained using SABER Sketch.
Advisors/Committee Members: Kazimierczuk, Marian K.
Subjects: Electrical Engineering
Keywords: Resonant converters; small-signal model
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7.
Baichbal, Shashidhar.
MAPPING ALGORITHM FOR AUTONOMOUS NAVIGATION OF LAWN MOWER USING SICK LASER.
Degree: MS, Electrical Engineering, 2012, Wright State University
► The objective of this thesis is to present a mapping algorithm for…
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▼ The objective of this thesis is to present a mapping algorithm for autonomous navigation of a lawnmower based on the range and bearing information of a SICK laser. The Simultaneous Localization and Mapping (SLAM) algorithm is a tool that can be used to navigate unmanned vehicle in an unknown environment. The two-dimensional (2D) maps of the obstacles can be obtained if the laser scans the environment in a plane horizontal to the ground. However, the 2D map does not give information of the objects that are placed below the height of the laser. This makes it difficult for the lawn mower to navigate the field since one of the objects (flower bed) is placed below the height of the laser. The computational complexity of the SLAM also makes it difficult to implement the algorithm on a low cost lawn mower. This thesis presents a mapping algorithm to map the environment that contains objects at a height below the laser. The localization of the unmanned vehicle is obtained from GPS (Global Positioning System) and IMU (Inertial Measurement Unit). The algorithm is simple and easy to implement as compared to the SLAM algorithm and was validated on the lawn mower. The position and dimensions of the flowerbed obtained using this algorithm closely matched the actual position from a reference point and dimensions of the flowerbed.
Advisors/Committee Members: Rattan, Kuldip.
Subjects: Electrical Engineering
Keywords: Mapping algorithm, SICK laser, 2D mapping, 3D perception
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8.
Baine, Nicholas Allen.
Integrity Monitoring Techniques for Vision Navigation Systems.
Degree: MS, Electrical Engineering, 2012, Wright State University
► In aviation applications, navigation integrity is paramount. Integrity of GPS systems is…
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▼ In aviation applications, navigation integrity is paramount. Integrity of GPS systems is well established with set standards. Vision based navigation systems have been found to be an adequate substitute for GPS, when it is unavailable but are unlikely to be utilized until there is a measure for system integrity. Work has been done to detect the effect of a single measurement pair being corrupted with a bias; however, the measurement geometry varies greatly with the environment. The environment could be sparse in visual features to track, or the environment could be rich with features. With more features, there is a greater probability of having multiple corrupted measurements. It is essential that multiple corrupt measurements are detected and excluded to assure the integrity and reliability of the system. This thesis focuses on understanding the existing integrity monitoring methods and using them for the detection of multiple errors in vision-based navigation systems. The current techniques are found to have the ability to detect single and multiple errors, but they cannot isolate them. This thesis develops an algorithm with the ability to isolate multiple erroneous measurements adding to the capabilities of existing integrity monitoring fault detection and isolation techniques.
Advisors/Committee Members: Rattan, Kuldip S.
Subjects: Aerospace Engineering; Electrical Engineering
Keywords: integrity monitoring; navigation; vision; optical; parity space
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9.
Benson, Stephen R.
Adaptive Thresholding for Detection of Radar Receiver Signals.
Degree: MS, Electrical Engineering, 2010, Wright State University
► Digital microwave receivers play a critical role in many of today's modern…
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▼ Digital microwave receivers play a critical role in many of today's modern radar tracking systems. The need for these digital receivers to push the boundaries in terms of bandwidth and input dynamic ranges (DR) is vital for their use in radar signal tracking. Significant research has been conducted in the area of the fast Fourier transform (FFT) to aid in continuing to enhance the performance capabilities of digital microwave receivers. However, with the advancement and increased complexity of these systems, the need for an efficient and effective adaptive thresholding technique is becoming ever more present. The proposed adaptive thresholding technique utilizes signal magnitude evaluations and multi-stage signal scaling throughout a 128-point FFT in order to effectively determine the optimal threshold for the microwave receiver. The incorporation of a 10-bit dynamic kernel function, as well as 14-bit word size between FFT stages is used to aid in increasing receiver sensitivity, multi-tone instantaneous dynamic range (IDR) and spurious free dynamic range (SFDR) performance. With the implementation of our adaptive thresholding technique, our receiver's maximum IDR is maintained between 34dB down to 24dB for input signal strengths ranging from -4dBm down to -32dBm. From simulation results incorporating the use of digitized data from our 10-bit Atmel ADC our Multi-Stage Scaling (MSS) receiver design is capable of obtaining an SFDR of 35.91dB using an input signal strength of -7dBm.
Advisors/Committee Members: Chien-In, Henry.
Subjects: Electrical engineering
Keywords: receiver design; Receiver; MSS; ISS; Thresholding; FFT; MSS Receiver
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10.
Billman, Steven John.
Design of a Low Power and Area Efficient Digital Down Converter and SINC Filter in CMOS 90-nm Technology.
Degree: MS, Electrical Engineering, 2011, Wright State University
► A digital down converter (DDC) typically receives a digital input that has…
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▼ A digital down converter (DDC) typically receives a digital input that has been generated by an analog to digital converter (ADC) operating at intermediate frequency (IF) in an RF receiver chain. The function of the DDC is to down convert the IF signal to baseband in phase (I) and quadrature (Q) signals and is a very important component in wireless receivers. A Digital Down Converter (DDC) is developed based on square wave local oscillators facilitating a multiplier-less implementation with no constraints on the sampling frequency. The DDC includes a pseudo multi-rate SINC low pass filter which exhibits better performance compared to the standard multi-stage SINC filter. The pseudo multi-rate SINC filter can be implemented with a unique cascaded integrator comb (CIC) filter to obtain the same improved performance. A 90nm CMOS design takes 8 bit inputs centered at 25 MHz with a bandwidth of 30 MHz and is clocked at 400MHz. The design demonstrates a flexible, very low power/size DDC architecture for single chip digital receiver applications. The layout area is 333.485um x 617.6um and the power consumption is 12.54mW when clocked at 400MHz.
Advisors/Committee Members: Ren, Saiyu.
Subjects: Electrical Engineering
Keywords: Digital Down Converter; SINC Filter
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11.
Blackaby, Jason M.
Simultaneous RF/EO Tracking and Characterization of Dismounts.
Degree: MS, Electrical Engineering, 2008, Wright State University
► This thesis discusses the fusion of radar frequency(RF) data and electro-optical (EO)…
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▼ This thesis discusses the fusion of radar frequency(RF) data and electro-optical (EO) data for tracking and characterization of dismounts (i.e., humans). Each of these sensor modalities provides unique information about the location, structure, and movement of a dismount. The person's location is tracked on the 2D ground plane using RF data for range measurements and EO data for angle measurements. Using this information, measurements are made on the structure and dynamic motion (gait) of the person. An imaging approach is used to create spatio-temporal activity maps along with a three-dimensional reconstruction of the dismount.
Advisors/Committee Members: Rigling, Brian.
Subjects: Electrical engineering
Keywords: signal processing; radar imaging; video processing; tracking; fusion
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12.
Boggs, Carla Renee.
Characterization of Room Temperature Terahertz Direct Detectors.
Degree: MS, Electrical Engineering, 2011, Wright State University
► Room temperature direct detectors operating in the so-called Terahertz (THz) region of…
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▼ Room temperature direct detectors operating in the so-called Terahertz (THz) region of the electromagnetic spectrum, and representing the most common detection technologies currently available, were characterized at 104, 280 GHz or 600 GHz within their intended range of operating frequencies. These detectors included commercial Schottky-diode rectifiers (Virginia Diodes and Spacek Labs), commercial pyroelectric detectors (Spectrum Detector), and a commercial Golay cell (QMCI). The characterization included antenna patterns, responsivity, electrical noise, noise equivalent temperature difference (NEΔT ), and noise equivalent power (NEP). Since all the characterization measurements were made the same way, quantitative comparisons can be made between the performances of the individual detectors and conclusions are drawn about their relative merits for particular applications. The noise characteristics of the amplifiers used in the experiments were also measured and taken into account in the characterization of the detectors.
Advisors/Committee Members: Brown, Elliott.
Subjects: Electrical Engineering; Engineering; Physics
Keywords: terahertz; millimeter-wave; submillimeter; detector; detector characterization; noise equivalent power; responsivity; NEP; noise equivalent temperature difference
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13.
Bone, Ryan T.
FPGA DESIGN OF A HARDWARE EFFICIENT PIPELINED FFT PROCESSOR.
Degree: MS, Electrical Engineering, 2008, Wright State University
► Digital receivers involve fast Fourier transform (FFT) computations that require a large…
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▼ Digital receivers involve fast Fourier transform (FFT) computations that require a large amount of arithmetic operations. The implementation of a FFT processor is one of the most challenging parts in the realization of a wideband receiver and its hardware complexity is very high. Hence, kernel function FFT processors have been proposed to meet real-time processing requirements and to reduce hardware complexity by rounding the kernel function to predetermined kernel points so as to eliminate the multipliers and use only shifters and adders or subtractors. Because of the nonlinear nature of this approximation by the rounding errors, spurious responses are generated and reduce the two signal instantaneous dynamic range (IDR) of the receiver in comparison with ideal FFT. Furthermore, there is a need to increase the resolution bits of the analog-to-digital converter (ADC) for FFT to improve the receiver performance by reducing the false alarm and increasing the spur-free dynamic range (SFDR). In this research, architecture for an FPGA-based 2.56 giga sample per second (GSPS) fixed kernel function FFT, using a truncated 10-bit ADC, is implemented. The FFT can produce an averaged single signal SFDR using the ideal ADC, of 22.8 dB with the ability to produce a two-signal IDR using the ideal ADC with a performance of 20.8 dB. With the ADC utilizing the eight most significant bit (MSB) values, the FPGA-based FFT can detect a weak input signal at -17.6 dBm at a full scale amplitude of 3.6 dBm. The resulting spurious-free dynamic range (SFDR) has a performance of 21.2 dB, which is very close to the ideal realization. The eight least significant bit (LSB) values where evaluated as well, generating a low signal detection of -22.7 dBm for a full scale amplitude of -9.3 dBm. This truncation scheme resulted in an SFDR performance of 13.4 dB. There was also a reduction in the hardware utilization with the FPGA implementation. With the employment of a folding technique the available resources where reduces by over 50% in comparison with the unfolded models.
Advisors/Committee Members: Chen, Chien-In Henry.
Subjects: Electrical engineering
Keywords: FFT, FPGA, IDR, SFDR, DIF, Radix-2, Kernel Function
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14.
Buck, Jonathan Gordon.
IMPROVED THRESHOLDING TECHNIQUE FOR THE MONOBIT RECEIVER.
Degree: MS, Electrical Engineering, 2007, Wright State University
► Wideband digital receivers typically use a very high sampling rate to capture…
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▼ Wideband digital receivers typically use a very high sampling rate to capture a signal for near real-time processing. Very robust digital techniques, like the Monobit FFT technique, have been developed to provide near real-time processing of captured timedomain signals. Most of these techniques trade accuracy for processing speed by approximating computationally complex mathematical operations. The approximation sometimes makes it difficult to detect multiple signals if the difference between their amplitudes is more than a few dB. This thesis presents a dynamic thresholding technique for multi-tone signal detection. The technique is based on setting an allowable ratio between the magnitude of the largest signal detected and any secondary signals. The technique is appropriate for any near real-time wideband receiver like the Monobit receiver. In the thesis we explain the progression to the "Ratio Thresholding Technique," and we present the test data and analysis.
Advisors/Committee Members: Emmert, John Marty.
Keywords: Electronic Warfare; Monobit Receiver; Digital Receiver; Frequency Domain Thresholding; Signal Detection; Signal Processing; FPGA
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15.
Burich, Lawrence D.
Digital Wideband Spectral Sensing Receiver.
Degree: MS, Electrical Engineering, 2012, Wright State University
► Detecting, channelizing, and characterizing radio frequency signals is a fundamental requirement for…
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▼ Detecting, channelizing, and characterizing radio frequency signals is a fundamental requirement for electronic warfare receivers as well as in commercial wireless applications where it is important to determine activity/inactivity in specified bands for spectral sharing and interference avoidance. Spectral sensing receivers are required to cover bandwidths in the GHz range and channelize signals into frequency bins in the kilo-hertz or mega-hertz range depending on the application. The difficulty is to detect, then determine spectral characteristics of multiple signals with varying power levels and signal characteristics in real time. A number of current Digital Wideband Spectral Sensing Receiver (DWSSR) architectures are based on the Fast Fourier Transform (FFT). An alternative to the FFT based design is a Filter Bank (FB) DWSSR which will be pursued in this thesis. The FB DWSSR is a flexible design with low complexity and better performance when compared to the FFT based DWSSR.
Advisors/Committee Members: Ren, Saiyu.
Subjects: Electrical Engineering
Keywords: digital wideband receiver; systolic array; FIR filter
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16.
Buxa, Peter E.
Parameterizable Channelized Wideband Digital Receiver for High Update Rate.
Degree: MS, Electrical Engineering, 2007, Wright State University
► Wideband digital receivers are important components used prevalently by the United States…
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▼ Wideband digital receivers are important components used prevalently by the United States Air Force for many modern electronic warfare systems. Currently, many digital receiver architectures are designed for a specific mission requirement and are not parameterizable, modular, or reusable for varying mission requirements. Also, many designs are technology, platform, and vendor dependent which make upgrading existing fielded systems costly and difficult. Additionally, current wideband FFT-based digital receivers must wait until a number of samples equal to the size of the FFT are collected before spectral information can be updated. Achieving a high spectral update rate is important for the accurate detection of the time of arrival of radar pulses so that enemy signals can be detected and located quickly. Current methods to increase the effective spectral update rate by N require an N-fold increase in clock rate or an N-fold increase in area. For this research, a parameterizable channelized wideband digital receiver architecture is proposed that takes advantage of the tradeoffs between frequency resolution and spectral update rate while preserving bandwidth, reducing hardware requirements, and increasing throughput. The design is completely parameterizable to suit varying mission requirements, and it has been written in generic VHDL which was targeted toward FPGA and ASIC platforms with no code modification. Components developed in VHDL include the decimation filter and Parks-McClellan filter design algorithm. The FPGA implementation was fully tested, and for the parameters chosen, was able to achieve an 8x improvement in update rate.
Advisors/Committee Members: Emmert, John M.
Keywords: Wideband Receiver; Digital Receiver; Electronic Warfare Receiver; Hardware-Based FFT; Polyphase DFT; Frequency Domain Decimation; Frequency Channelization; FFT
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17.
Buzakuk, Ramadan U.
Dynamic Footed with Clock Overlapping and Load Balancing in Multiple Paths for Noise Tolerance in Dynamic CMOS Circuits.
Degree: MS, Electrical Engineering, 2011, Wright State University
► Dynamic CMOS circuits are used in microprocessors as well as in circuits…
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▼ Dynamic CMOS circuits are used in microprocessors as well as in circuits that require high speed and small areas. Dynamic CMOS circuits have many advantages but are not robust in noise tolerance in comparison with the legacy static CMOS circuits. In this thesis several noise tolerance techniques that can be implemented with Dynamic CMOS circuits for robust noise tolerance are studied. A dynamic footed with clock overlapping technique integrated with a load balancing multiple-path transistor sizing algorithm for optimizing performance of noise tolerance and speed while in consideration of process variations is presented. Using the 2-bit weighted binary-to-thermometric converter implemented in 130-nanometer CMOS process as a benchmark circuit, noise tolerance and speed measurements were conducted by Monte-Carlo simulation in process variations. The input noise tolerance for the benchmark circuit was improved by 75%. The worst-case delay and standard deviation in process variations were improved by 52.2% and 53.5%, respectively.
Advisors/Committee Members: Chen, Chien-In Henry.
Subjects: Electrical Engineering; Engineering
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18.
Case, Ellen E.
A Low-Cost Acoustic Array for Detecting and Tracking Multiple Acoustic Targets.
Degree: MS, Electrical Engineering, 2008, Wright State University
► A wide variety of real-world targets emit distinct acoustic signatures that not…
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▼ A wide variety of real-world targets emit distinct acoustic signatures that not only distinguish them from one another but also provide spectral separation from background clutter. While acoustic signatures are distinct, they can also be highly variable, even for an individual target, making detection and tracking a challenging problem. This thesis presents a low-cost acoustic array using commercial off-the shelf (COTS) hardware to detect and track multiple small, moving, acoustic targets. It implements a cross-correlation method for calibration, delay-and-sum beamforming, CA-CFAR detection, a discrete Kalman filter for tracking, and nearest neighbor data association. In addition, the array is designed to be adaptable in use, mobile, and reproducible.
Advisors/Committee Members: Rigling, Brian.
Subjects: Electrical engineering
Keywords: acoustic array, CA-CFAR detection, Kalman filter, tracking
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19.
Chen, Jian.
ULTRA LOW POWER READ-OUT INTEGRATED CIRCUIT DESIGN.
Degree: MS, Electrical Engineering, 2012, Wright State University
► Carbon nanotubes (CNTs) are widely studied by the researchers in recent years,…
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▼ Carbon nanotubes (CNTs) are widely studied by the researchers in recent years, as they have small size, large strength, highly electrical and thermal conductivity. The single-walled CNT (SWNT) is readily changed in electrical resistance when exposed to gas, and has significant use in environmental monitoring, agriculture and fishing industry, chemical industry and even security. A read-out integrated circuit (ROIC) is required to detect the resistive change. In this thesis, an ultra-low power, wide dynamic detecting range and small size CMOS ROIC design is presented. This ROIC can interface wide dynamic range signal up to more than two orders (100pA-60nA) from deployable sensors using automatic gain control (AGC) unit. A novel technology of sub-threshold technique is applied in this design, which can save up to 96% (from 25.2mW to 0.89mW) power consumption comparing to the circuit operating in super-threshold. To improve the accuracy of calibrated readout current, compensation factor derived from the analysis of simulation results is finally added. The proposed circuit also has the capability to output 8 bit digital signal that can be transmitted wirelessly to the data center for further signal processing.
Advisors/Committee Members: Ren, Saiyu.
Subjects: Electrical Engineering
Keywords: AGC; CNTs sensor; TIA; ROIC; Sub-threshold; Wide dynamic range; Ultra low power
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20.
Chiang, Tony.
Design and Evaluation of a Discrete Wavelet Transform Based Multi-Signal Receiver.
Degree: MS, Electrical Engineering, 2006, Wright State University
► General purpose receivers of today are designed with a broad bandwidth so…
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▼ General purpose receivers of today are designed with a broad bandwidth so that the receiver can accept a wide range of signal frequencies. These receivers usually accept one signal along with any interference that is included. To increase the signal detection capabilities of the wideband receiver, a design for a receiver that can detect two signals is needed. One of the requirements for this receiver is that the second weak signal needs to be processed in a timely manner so that the receiver can recognize it. To remedy the problem, a module was developed using wavelet-based techniques to remove spurs from the incoming signals to allow easier detection. The main basis for this concentration on wavelets comes from the way wavelets break down signals into portions (called resolutions) that allow easier determination of detail importance. Utilizing the multi-resolution attributes of the discrete wavelet transform, a way to remove signal spurs is made possible. When removing the signal noise from the signal, the two signal dynamic range of the system is increased, as this module is applied to multiple receiver systems for comparison of performance. Implementation of this system was originally done in C as well as MATLAB, but later is being implemented in VHDL with simulations done for verification of functionality.
Advisors/Committee Members: Chen, Chien-In Henry.
Keywords: discrete, wavelet, transform, receiver, design
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21.
Choragudi, Venkata Sai Aditya Kumar.
Analysis and Design of Pulse-Width Modulated Two-Switch Forward DC-DC Converter for Universal Laptop Adapter.
Degree: MS, Electrical Engineering, 2011, Wright State University
► The objective of this research is to analyze, design and simulate a…
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▼ The objective of this research is to analyze, design and simulate a two-switch forward pulse-width modulated (PWM) DC-DC converter. The Forward PWM DC-DC converter is originally derived from the buck converter by the addition of a transformer. The transformer is mainly used as a safety feature to electrically isolate input and output stages of the power converter and also to scale the voltage or current. The steady-state analysis is presented for the two-switch PWM DC-DC forward converter in continuous conduction mode (CCM). Based on the analysis, the design equations for two-switch PWM forward DC-DC converter are derived. A design example is given. Furthermore, a detailed procedure to design a high-frequency (HF) two-winding power transformer is presented for CCM. The 60 W/ 20 V two-switch forward converter is designed for universal laptop adapter. Simulation results are provided to validate the theoretical analysis.
Advisors/Committee Members: Kazimierczuk, Marian.
Subjects: Electrical Engineering
Keywords: two-switch
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22.
Clark, Lee A.
HYPERSPECTRAL METHODS OF DETERMINING GRIT APPLICATION DENSITY ON SANDPAPER.
Degree: MS, Electrical Engineering, 2010, Wright State University
► A low cost real time method of determining the density of grit…
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▼ A low cost real time method of determining the density of grit applied to sandpaper does not currently exist. This thesis will explore three methods for determining grit density from digital image data. A means to characterize the application in terms of frequency by using direct cosine transform basis images will be explored. An RX detector algorithm to characterize the image background will be tested. A linear unmixing methodology will be developed that characterizes the proportion of glue and grit present in each hyperspectral pixel vector.
Advisors/Committee Members: Xue, Kefu.
Subjects: Electrical engineering
Keywords: grit density; hyperspectral linear unmixing
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23.
Clark, Matthew A.
The Harmonic Distortion Reduction of Phase-Angle Fired SCRs Feeding a Resistive Load using Fuzzy Logic.
Degree: MS, Electrical Engineering, 2010, Wright State University
► High power silicon controlled rectifiers (SCR) are used in the application of…
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▼ High power silicon controlled rectifiers (SCR) are used in the application of infrared radiation testing. A case study has been performed on a department of defense facility utilizing SCRs to transfer electrical energy to thermal energy. The facility is capable of generating up to 5000 °F across large cross-sectional areas, requiring tens of megawatts of power. The combination of high power, unbalanced loads, and SCR switching generate high harmonic disturbances that offer significant challenges for conventional linear control systems. In addition, unbalanced three-phase distribution systems are difficult to model, specifically during switching transients. Fuzzy logic is used to characterize the non-linear plant dynamics, control the system output, and reduce harmonics. Although the use of fuzzy logic for harmonic reduction has been used extensively in the power industry, most applications focus on compensating for harmonic disturbance rather than avoiding it. Harmonic compensation adds hardware in the system, which adds maintenance costs and inefficiency. This thesis introduces a technique to eliminate harmonic content in the control loop without adding additional hardware. A simulation of the system was created and fuzzy logic was used to characterize the behavior of the simulation. The simulation results demonstrated the non-linear control problem and identified key harmonic areas to avoid. A fuzzy proportional-integral controller along with a fuzzy harmonic reduction controller is implemented in this thesis to improve the control response while avoiding harmful harmonic interference. The fuzzy harmonic reduction controller yielded a hybrid pulse width modulation output that eliminated the most harmful harmonics while maintaining closed loop control.
Advisors/Committee Members: Rattan, Kuldip.
Subjects: Electrical engineering
Keywords: Fuzzy Logic, Control, Power, SCR, Harmonics, Substations
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24.
DALAL, MANISH A.
High Voltage DC Converter Systems Modeling, Simulation and Analysis.
Degree: MS, Electrical Engineering, 2009, Wright State University
► The thesis provides insights into important modeling techniques to model the converter…
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▼ The thesis provides insights into important modeling techniques to model the converter system, machine design, control and power stages and integration of the various sub systems to simulate the system level performance. This innovative modeling and simulation project is very relevant to optimizing the system performance, designing the sub circuits, components selection, predicting the system stability and impulse responses. The thesis presents modeling and simulation of three different 270VDC converter systems and comparing their performances against each other. The 270VDC converter system accepts either Generator 3-phase AC voltages or fixed three voltage source followed by single or dual converter stages depending on different topologies. The models developed for the high voltage DC systems are optimized to provide robust controls, close loop regulation and transient performance without any algebraic loop by employing valuable modeling techniques. The detailed modeling approach significantly minimizes the development cost by having the model representation of the actual system before the prototype development to ensure ‘first time right’ designs. The system model developed on industry common software platforms establishes the ‘boiler plate’ to allow the new systems to be modeled simply by delta changes on the base systems.
Advisors/Committee Members: Kazimierczuk, Marian.
Subjects: Electrical engineering
Keywords: Converter; Modeling; Simulation; Generator; High Voltage
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25.
Desai, Pratikkumar U.
Localization and Surveillance using Wireless Sensor Network and Pan/Tilt Camera.
Degree: MS, Electrical Engineering, 2009, Wright State University
► The ever growing challenges in hostile environments, health care and warzone require…
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▼ The ever growing challenges in hostile environments, health care and warzone require accurate indoor localization and surveillance. The de facto localization technique using GPS has poor indoor performance due to the complexity of the indoor environment. Other Radio frequency based indoor localization techniques are unable of accurate localization due to multipath fading. In this thesis, a system consisting of Cricket wireless sensor motes, a camera and a Pan/Tilt gimbal is proposed to solve the indoor localization and surveillance problems. The system is easy to deploy, is cost effective and gives accurate results. The Crickets motes use the Time Difference of Arrival (TDoA) between the RF and the ultrasound signals to estimate the distance of the object. Multilateration is used to calculate the position of the object in the reference beacon coordinate system. This position is then transformed to the object coordinate system to calculate the pan and tilt angles of the gimbal which are then used to direct the camera to the object. The programming language JAVA was used to develop a GUI program to interface the gimbal, the camera and the Cricket motes. The localization and tracking of the object was successfully carried out in the laboratory. The accuracy of the system was tested using a laser pointer mounted on top of the camera and was shown that the system tracked the object with negligible error.
Advisors/Committee Members: Rattan, Kuldip.
Subjects: Electrical engineering
Keywords: wireless sensor network, localization, pan/tilt gimbal, surveillance
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26.
Doss, Gary Richard Jr.
Novel Intelligent Power Supply Using A Modified Pulse Width Modulator.
Degree: MS, Electrical Engineering, 2009, Wright State University
► Doss Jr., Gary Richard. M.S.E., Department of Electrical Engineering, Wright State…
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▼ Doss Jr., Gary Richard. M.S.E., Department of Electrical Engineering, Wright State University, 2009. Novel Intelligent Power Supply Using a Modified Pulse Modulator The objective of this M.S. Thesis was to design, simulate, construct and test a pulse-width-modulated Buck DC-DC Converter and its compensated feedback system. Equations for the design and component selection of a buck converter have been obtained for operating the buck converter in the continuous conduction mode (CCM). A hardware version of the converter design has been implemented to demonstrate the functionality of the designed converter. Also, a digital buck converter control system has been designed and simulated. This digital buck converter led to the development of a proposed control scheme for Switched Mode Power Supplies (SMPS). A novel hybrid feedback control scheme has been proposed, analyzed and simulated. This proposed novel control system implements a proposed novel device that accepts commands from an intelligent source, such as a processor, while allowing the SMPS to apply power to the system under analog control. Once the processor is functioning, it can adjust and tweak characteristics of the power supply to obtain the best power output for the operating environment.
Advisors/Committee Members: Kazimierczuk, Marian.
Subjects: Electrical engineering; Systems design
Keywords: Buck; Switched Mode Power Supply; Modified Pulse Width Modulator; DCDC Converter; buck power supply design; buck converter; smps
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27.
Earick, Weston R.
DESIGN OF A HIGH-POWER, HIGH-EFFICIENCY, LOW-DISTORTION DIRECT FROM DIGITAL AMPLIFIER.
Degree: MS, Electrical Engineering, 2006, Wright State University
► For the process of converting low-power digital signals into their high-power analog…
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▼ For the process of converting low-power digital signals into their high-power analog counterparts, the functions of digital-to-analog conversion (at low power) and analog power amplification are separately implemented. This thesis proposes a new “STAC-DAC” circuit topology which directly realizes high-power analog output from low-power digital input signals. The ability to achieve a “direct from digital” high-power analog output in a single high-efficient, low-distortion design has significant potential in audio reproduction, and flexible signal generation applications. In this thesis, the “STAC-DAC” is described and its implementation via MATLAB and LTSpice is discussed. The results of simulations are used to prove the concept of the design. The 16-bit design features a high-power output of 100 watts or more at an efficiency of 93%. The design is optimized to feature low total harmonic distortion (THD) of 0.055% for a 1 kHz signal at 100 watts into an 8 Ω load and low phase distortion of less than 10° for a 20 kHz signal and only 1° at 1 kHz. The “STAC-DAC” design is applicable to any design which requires a high-power analog output that is controlled by a logic level digital input. The results validated that the “STAC-DAC” can produce low-level THD figures over the audio frequency range. If very low THD figures are not necessary, high-power analog operation can be achieved into the hundreds of kilohertz while maintaining high efficiency. These results show that the power “STAC-DAC” is capable of simultaneously achieving the highly efficient circuitry associated with digital-to-analog converters with the low harmonic and phase distortion requirements associated with high fidelity analog audio amplifiers.
Advisors/Committee Members: Kazimierczuk, Marian.
Keywords: high-power; high-efficiency; low-distortion; direct from digital; digital amplifier; amplifier; digital-to-analog converter; DAC; audio; total harmonic distortion; THD; high-fidelity
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28.
Farfan-Ramos, Luis.
Real-time Fault Diagnosis of Automotive Electrical Power Generation and Storage System.
Degree: MS, Electrical Engineering, 2011, Wright State University
► Automobiles depend more and more on electric power. Analysis of warranty data…
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▼ Automobiles depend more and more on electric power. Analysis of warranty data by automotive OEMs shows that faults in the automotive electrical power generation and storage (EPGS) system are often misdiagnosed. Therefore, monitoring of the state of health (SOH) of the automotive EPGS system is vital for early and correct diagnosis of faults in it, ensuring a reliable supply of electric power to the vehicle and reducing maintenance costs. In this research project, a model-based SOH monitoring method for the EPGS system is developed without the requirement of an alternator current sensor. A model representing the dynamic relationship between the battery current and the alternator filed duty voltage cycle is presented. An important model parameter that characterizes the current generation efficiency of the alternator system is adaptively estimated by using a recursive least square algorithm. Based on fault modes and effect analysis, a model-based fault detection and isolation decision scheme is developed for the EPGS system faults under consideration. The SOH monitoring method has been implemented using an EPGS system experimental test bench at GM R and D Center. Real-time evaluation results have shown its effectiveness and robustness.
Advisors/Committee Members: Zhang, Xiaodong.
Subjects: Automotive Engineering; Electrical Engineering; Energy; Engineering; Technology
Keywords: automotive; vehicular; electric; power; generation; storage; EPGS; real time; state of health; SOH; diagnosis; prognosis; fault; detection; isolation; model; parameter estimation; alternator; battery; belt
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29.
Feirstine, Kelly Renee.
A Study of the Impact of Hardware Design Choices on the System Impulse Response of a Signal-level Radar Simulation.
Degree: MS, Electrical Engineering, 2006, Wright State University
► The main goal of this research is to study the effect of…
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▼ The main goal of this research is to study the effect of hardware design choices at the signal-level of an end-to-end radar system. An implementation of waveform diversity concepts, or the use of various waveforms in both transmit and receive is employed. An end-to-end Matlab simulation is developed such that the system impulse response to hardware imperfections and waveform parameters such as bandwidth and frequency channel spacing can be analyzed. Multiple frequency channels as well as multiple pulses are also considered in the research. All hardware components are nonlinear to some degree. The nonlinearities of the hardware give rise to unwanted spectral components in the output. Therefore, models that simulate the behavior of both ideal and non-ideal hardware components are developed. A user friendly interface is developed in which each hardware component can be interchanged between the ideal and non-ideal model. In studying both the system impulse response to ideal components as well as the response to non-ideal components, the impact of the nonlinearities on cross-correlation signal detection and range-Doppler can be analyzed.
Advisors/Committee Members: Rigling, Brian.
Keywords: Radar; hardware design; cross-correlation; range-Doppler; impulse response metrics
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30.
Flynn, John.
GPS Coarse Acquisition Using the MonoBit FFT Algorithm in a Broadband Receiver.
Degree: MS, Electrical Engineering, 2008, Wright State University
► The purpose of this research was to investigate the feasibility of using…
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▼ The purpose of this research was to investigate the feasibility of using broadband electronic warfare (EW) receivers for Global Position System (GPS) tracking. These are pulse-oriented receivers, typically with input bandwidths of 1 Ghz or larger, and so by definition do not have the same characteristics and processing of continuous wave (CW) receivers like GPS devices, FM radios, etc. For example, the spectral output of the Fast Fourier Transform (FFT) used in broadband signal processing updates on the frequency of the FFT input sample size, versus a CW receiver which updates on a more continuous basis. The foundation of this potential broadband application of GPS hinges on the ability to accurately detect the GPS Satellite Coarse Acquisition (C/A) Code, which is phase modulated onto the GPS L1 carrier signal. This study uses the high speed Monobit FFT approximation technique developed by Dr. A. Despain [1] and Dr. Jim Tsui as the core signal processor, of which Dr. Tsui holds patents [2,3]. The cyclical C/A Code FFT spectral bin components are processed and compared to a known good C/A code for a given satellite to determine the accuracy of the correlation. The novel EW GPS technique developed in this thesis indicates that GPS satellite C/A codes can indeed be reasonably processed with broadband techniques, at least with the Monobit FFT, and that this foundational work can be built upon in the future so that broadband devices can ultimately be used for GPS applications. Synthesizable deliverables include a phase detector, a hardware signal condenser, and a correlation module. A robust Hardware Description Language (HDL) Test Bench, several signal generators, and various Matlab support tools were also developed.
Advisors/Committee Members: Emmert, John.
Subjects: Electrical engineering
Keywords: GPS; C/A Code; Monobit FFT; Broadband; VHDL
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[1] [2] [3] [4]